[PATCH] D57504: RFC: Prototype & Roadmap for vector predication in LLVM

[Simon Moll via Phabricator via llvm-commits]

simoll added a subscriber: uweigand.
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DevMtg Summary

- There will be a separate RFC for the generalized pattern rewriting logic in LLVM-VP (see `PatternMatch.h`). We do this because it is useful for other efforts as well, eg to make the existing pattern rewrites in InstSimplify/Combine, DAGCombiner work also for constrained fp (@uweigand ) and complex arithmetic (@greened) . This may actually speedup things since we can pursue VP and generalized pattern match in parallel.
- @nhaehnle  brought up that the LLVM-VP intrinsics should be convenient and natural to work with. The convenience wrappers (`PredicatedInstruction`, `PredicatedBinaryOperator`) and pattern rewrite generalizations already achieve this to a large extent. Specifically, there should be no "holes" when it comes to handling the intrinsics (eg it should not be necessary to resort to lower-level APIs (`VPIntrinsic`) when dealing with predicated SIMD). //(To take something actionable from this, i think there should be an `IRBuilder<>::CreateVectorFAdd(A, B, Mask, AVL, InsertPt)`, returning a `PredicatedBinaryOperator`, which may either be an `FAdd` instruction (or constrained fp..) or a `llvm.vp.fadd` intrinsic, depending on the fp environment, mask parameter, and vector length parameter.)//


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  rL LLVM

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https://reviews.llvm.org/D57504