[PATCH] D69219: [SelectionDAG] Enable lowering unordered atomics loads w/LoadSDNode (and stores w/StoreSDNode) by default

[Philip Reames via Phabricator via llvm-commits]

reames updated this revision to Diff 226749.
reames added a comment.
Herald added a subscriber: hiraditya.

It looks like I screwed up somewhere.  I went to land the approached patch, ran make check and saw a bunch of unexpected failures.

Looking into the diffs thereof, it appears the new implementation is still buggy.  We appear to be splitting an atomic load/store in some cases rather than emitting a library call.  This is definitely incorrect.

As such, I'm considering the LGTMs here revoked, and will refresh this patch once issue is fixed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69219/new/

https://reviews.llvm.org/D69219

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
  llvm/test/CodeGen/X86/atomic-non-integer.ll
  llvm/test/CodeGen/X86/atomic-unordered.ll
  llvm/test/CodeGen/X86/atomic128.ll
  llvm/test/CodeGen/X86/combineIncDecVector-crash.ll

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