[PATCH] D64630: [DebugInfo] Address performance regression with r364515

[Vedant Kumar via Phabricator via llvm-commits]

vsk added a comment.

In your summary you mentioned that:

> However, getting the slot requires a forwards-walk through the block until a non-debug instruction is found.

Is it possible to just speed that part up? If so, we could just keep the simpler `mergingChangesDbgValue` implementation.

Possible options include: 1) computing a slot indexes structure for dbg_values on the side or 2) changing the MIR representation (akin to D51664 <https://reviews.llvm.org/D51664>, or introducing DBG_VALUE_PACKs -- @rnk suggested this a few comments up already, but I assume this is a stretch?). It might be nice to do something along these lines, since the approach in this patch looks like it can walk each MBB in the program (twice) per coalesce pair? Here's a hare-brained sketch of (1):

  DVNumbers = map of DBG_VALUE to number
  DVSlots = map of number interval to Slot
  CurSlot = nullptr
  DVPackLen = 0
  for (index, MI) in enumerate(rpot(MF)):
    if MI is DBG_VALUE:
      DVNumbers[MI] = index
      DVPackLen++
    else:
      CurSlot = slot for the current MI
      if DVPackLen > 0:
        DVSlots[{index - DVPackLen, index}] = CurSlot
        DVPackLen = 0



================
Comment at: lib/CodeGen/RegisterCoalescer.cpp:3363
+// queries for DBG_VALUEs is slow.
+static void CheckDbgValuesInBlock(const SlotIndexes &Slots,
+                                  MachineBasicBlock *MBB,
----------------
`CheckDbgValuesInBlock` looks like it's more about making dead dbg_values `undef` than about checking them. Let's call it `makeDeadDbgValsUndef`?


Repository:
  rL LLVM

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  https://reviews.llvm.org/D64630/new/

https://reviews.llvm.org/D64630