[PATCH] D69413: [AMDGPU] Fold AGPR reg_sequence initializers

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 24 16:12:41 PDT 2019


rampitec marked 6 inline comments as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFoldOperands.cpp:699
+        DenseMap<TargetInstrInfo::RegSubRegPair, Register> VGPRCopies;
+        SmallSetVector<TargetInstrInfo::RegSubRegPair, 32> SeenAGPRs;
+        for (unsigned I = 0; I < Size / 4; ++I) {
----------------
arsenm wrote:
> I think 32 is a bit big for a small set size
32 is a maximum register tuple which can come here.


================
Comment at: llvm/lib/Target/AMDGPU/SIFoldOperands.cpp:733
+            // create a copy here and track if we already have such a copy.
+            if (TRI->isSGPRReg(*MRI, Src.Reg) && Def->getParent()) {
+              CopyToVGPR = Src;
----------------
arsenm wrote:
> Why is this checking Def->getParent()? Why is an instruction under consideration that isn't inserted in a block?
It's a leftover from a check that was not needed ;) Thanks.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69413/new/

https://reviews.llvm.org/D69413





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