[PATCH] D69365: [X86] Use 64-bit version of source register in LowerPATCHABLE_EVENT_CALL and LowerPATCHABLE_TYPED_EVENT_CALL

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added a reviewer: dberris.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

The PATCHABLE_EVENT_CALL uses i32 in the intrinsic. This
results in the register allocator picking a 32-bit register. We
need to use the 64-bit register when forming the MOV64rr
instructions. Otherwise we print illegal assembly in the text
output.

I think prior to this it was impossible for SrcReg to be equal
to DstReg so the NOP code was not reachable.

While there use Register instead of unsigned.

Also add a FIXME for what looks like a bug.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D69365

Files:
  llvm/lib/Target/X86/X86MCInstLower.cpp
  llvm/test/CodeGen/X86/xray-custom-log.ll
  llvm/test/CodeGen/X86/xray-typed-event-log.ll

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