[PATCH] D69246: [RISCV] Add support for half-precision floats

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D69246#1716876 <https://reviews.llvm.org/D69246#1716876>, @lenary wrote:

> This is looking good to me. I'd like you to precommit the tests.


What do you mean? (Don't forget that the load ext / trunc store tests require this patch's code changes)

> I find the libcall ABI slighly odd (__gnu_h2f_ieee takes the half-precision arg in `a0` and returns the result in `fa0`, it seems, which strikes me as a bit odd, but maybe I'm missing something). That said, that probably isn't an issue with this patch specifically.

That makes sense. The half-precision float isn't a floating-point value as understood by the FP unit, so it has to go in a GPR, for ALU operations to slice up the fields and build the normal IEEE 754 32-bit representation, which can then be returned as a regular float -- which for ilp32f is of course returned in an FPR.


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  https://reviews.llvm.org/D69246/new/

https://reviews.llvm.org/D69246