[PATCH] D64830: [Xtensa 4/10] Add basic *td files with Xtensa architecture description.

[James Y Knight via Phabricator via llvm-commits]

jyknight added a comment.

In D64830#1634592 <https://reviews.llvm.org/D64830#1634592>, @aykevl wrote:

> I do not think there is a reason why the Xtensa architecture shouldn't be included in LLVM. As a comparison, there is also the proprietary (Google) Lanai architecture which was added at a time when there was little public information on it and to this time nobody can actually buy Lanai hardware (there is only a simulator). As a comparison, Xtensa has easy to get hardware (in the form of the ESP8266/ESP32) and is already supported in GCC/binutils.


I'd note that Lanai did publish a set of ISA docs as part of upstreaming the llvm backend.

Having something like that perhaps doesn't need to be a hard-blocker, but I'd love to see a real response from the xtensa folks, since AFAICT it looks as if like there *IS* ISA documentation, just perhaps not -- officially -- publicly available. It would make things much easier to understand if xtensa published what they had. Without that, nobody else can really review or understand the backend.


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