[PATCH] D67722: [PowerPC] Remove redundant CRSET/CRUNSET in custom lowering of known CR bit spills

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai requested changes to this revision.
nemanjai added a comment.
This revision now requires changes to proceed.

I believe we could end up with run-time errors (SIGILL) if we get rid of a CRBIT spill and build with `-ppc-late-peephole=false`. As a result, we need to make sure we get rid of any of those nops we may have introduced.



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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:3180
 
+def UNENCODED_NOP: PPCEmitTimePseudo<(outs), (ins), "#UNENCODED_NOP", []>;
 
----------------
Please add a comment here along the lines of:
```
// Pseudo-instruction marked for deletion. When deleting the instruction
// would cause iterator invalidation in MIR transformation passes, this
// pseudo can be used instead. It will be removed unconditionally at
// pre-emit time (prior to branch selection).
```


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Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:163
     bool runOnMachineFunction(MachineFunction &MF) override {
       if (skipFunction(MF.getFunction()) || !RunPreEmitPeephole)
         return false;
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We need to change this to add a loop that only gets rid of `UNENCODED_NOP` instructions. Regardless of whether we want any of the transformations in this pass to run, we definitely need to get rid of those. If we are skipping the rest of the transformations, then we just need to get rid of these nops.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67722/new/

https://reviews.llvm.org/D67722