[PATCH] D68443: [PowerPC] Spill CR LT bits on P9 using setb

[Kamau Bridgeman via Phabricator via llvm-commits]

kamaub added a comment.

Looks good to me, just a note about the summary:

> spill CR[0-1]LT bits on POWER9 using the setb instruction

I think you changed the spill for all fields' LT bit as per the if statement so, this might be due for a change.



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Comment at: llvm/test/CodeGen/PowerPC/spill_p9_setb.ll:1
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:     -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s \
----------------
nit: Add a note to describe this test case's purpose


Repository:
  rL LLVM

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  https://reviews.llvm.org/D68443/new/

https://reviews.llvm.org/D68443