[PATCH] D68672: [APInt] Rounding right-shifts

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

In D68672#1714990 <https://reviews.llvm.org/D68672#1714990>, @nikic wrote:

> In D68672#1707404 <https://reviews.llvm.org/D68672#1707404>, @lebedev.ri wrote:
>
> > I'm not sure i can parse that, fall out?
>
>
> Sorry, what I meant is that the normal lshr/ashr will behave as desired for the purposes of determining a shl GNWR range. Something along the lines of...
>
>   case Instruction::Shl: {
>     APInt UMax = Other.getUnsignedMax();
>     unsigned MaxShift = Unsigned ? BitWidth - 1 : BitWidth - 2;
>     if (UMax.uge(MaxShift)) // (An intersect would be more precise)
>       return ConstantRange(APInt::getNullValue(BitWidth));
>     if (Unsigned)
>       return getNonEmpty(APInt::getNullValue(BitWidth),
>                          APInt::getMaxValue(BitWidth).lshr(UMax) + 1);
>     return getNonEmpty(APInt::getSignedMinValue(BitWidth).ashr(UMax)
>                        APInt::getSignedMaxValue(BitWidth).ashr(UMax) + 1);
>   }
>
>
> We can still add these methods, they just don't seem necessary for the use-case you mentioned, unless I'm missing something.


As i have discovered since then, it may make sense to first handle `mul` in CVP before looking into shifts.
So in this case it would be mainly good to have these for consistency.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68672/new/

https://reviews.llvm.org/D68672