[PATCH] D69187: [GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet created this revision.
qcolombet added reviewers: dsanders, aditya_nandakumar, volkan, paquette, aemerson, arsenm.
Herald added subscribers: hiraditya, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.

The default implementation of isIncomingArgumentHandler could lead in generating incorrect code.
Make it a pure virtual method, so that targets know they have to override it to produce correct code.

NFC


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D69187

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
  llvm/lib/Target/AArch64/AArch64CallLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  llvm/lib/Target/ARM/ARMCallLowering.cpp
  llvm/lib/Target/X86/X86CallLowering.cpp


Index: llvm/lib/Target/X86/X86CallLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86CallLowering.cpp
+++ llvm/lib/Target/X86/X86CallLowering.cpp
@@ -102,6 +102,8 @@
         DL(MIRBuilder.getMF().getDataLayout()),
         STI(MIRBuilder.getMF().getSubtarget<X86Subtarget>()) {}
 
+  bool isIncomingArgumentHandler() const override { return false; }
+
   Register getStackAddress(uint64_t Size, int64_t Offset,
                            MachinePointerInfo &MPO) override {
     LLT p0 = LLT::pointer(0, DL.getPointerSizeInBits(0));
Index: llvm/lib/Target/ARM/ARMCallLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMCallLowering.cpp
+++ llvm/lib/Target/ARM/ARMCallLowering.cpp
@@ -90,6 +90,8 @@
                        MachineInstrBuilder &MIB, CCAssignFn *AssignFn)
       : ValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB) {}
 
+  bool isIncomingArgumentHandler() const override { return false; }
+
   Register getStackAddress(uint64_t Size, int64_t Offset,
                            MachinePointerInfo &MPO) override {
     assert((Size == 1 || Size == 2 || Size == 4 || Size == 8) &&
Index: llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
@@ -37,6 +37,8 @@
 
   MachineInstrBuilder MIB;
 
+  bool isIncomingArgumentHandler() const override { return false; }
+
   Register getStackAddress(uint64_t Size, int64_t Offset,
                            MachinePointerInfo &MPO) override {
     llvm_unreachable("not implemented");
Index: llvm/lib/Target/AArch64/AArch64CallLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64CallLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64CallLowering.cpp
@@ -136,6 +136,8 @@
         AssignFnVarArg(AssignFnVarArg), IsTailCall(IsTailCall), FPDiff(FPDiff),
         StackSize(0) {}
 
+  bool isIncomingArgumentHandler() const override { return false; }
+
   Register getStackAddress(uint64_t Size, int64_t Offset,
                            MachinePointerInfo &MPO) override {
     MachineFunction &MF = MIRBuilder.getMF();
Index: llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
===================================================================
--- llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
+++ llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
@@ -118,7 +118,7 @@
 
     /// Returns true if the handler is dealing with incoming arguments,
     /// i.e. those that move values from some physical location to vregs.
-    virtual bool isIncomingArgumentHandler() const { return false; }
+    virtual bool isIncomingArgumentHandler() const = 0;
 
     /// Materialize a VReg containing the address of the specified
     /// stack-based object. This is either based on a FrameIndex or


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