[PATCH] D68930: [InstCombine] Shift amount reassociation in shifty sign bit test (PR43595)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp:29-30
+//
+// AnalysisIsSignbitExtract is special - we will only analyze whether this
+// pattern has two right-shifts that shift my one less than original bit width,
+// thus extracting original sign bit, and return the base value X if so.
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spatel wrote:
> Code comment typo and difficult to parse. Maybe better:
> AnalyzeForSignBitExtraction indicates that we will only analyze whether this pattern has any 2 right-shifts that sum to 1 less than original bit width.
Indeed, that is better; and fixes the param name.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D68930/new/

https://reviews.llvm.org/D68930