[llvm] r375087 - [ARM][MVE] Change VPST to use, not def, VPR
Sam Parker via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 17 01:46:31 PDT 2019
Author: sam_parker
Date: Thu Oct 17 01:46:31 2019
New Revision: 375087
URL: http://llvm.org/viewvc/llvm-project?rev=375087&view=rev
Log:
[ARM][MVE] Change VPST to use, not def, VPR
Unlike VPT, VPST just uses the current value of VPR.P0.
Differential Revision: https://reviews.llvm.org/D69037
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrMVE.td
llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block7.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block8.mir
llvm/trunk/test/CodeGen/Thumb2/mve-vpt-nots.mir
Modified: llvm/trunk/lib/Target/ARM/ARMInstrMVE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrMVE.td Thu Oct 17 01:46:31 2019
@@ -4791,7 +4791,7 @@ def MVE_VPST : MVE_MI<(outs ), (ins vpt_
let Unpredictable{7} = 0b1;
let Unpredictable{5} = 0b1;
- let Defs = [VPR];
+ let Uses = [VPR];
let validForTailPredication = 1;
}
Modified: llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll Thu Oct 17 01:46:31 2019
@@ -44,16 +44,16 @@ define arm_aapcs_vfpcc void @fast_float_
; CHECK-NEXT: .LBB0_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r3
-; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q0, [r1]
; CHECK-NEXT: vldrwt.u32 q1, [r2]
-; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: vmul.f32 q0, q1, q0
; CHECK-NEXT: vpst
; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: adds r2, #16
; CHECK-NEXT: adds r0, #16
+; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: le lr, .LBB0_5
; CHECK-NEXT: b .LBB0_11
; CHECK-NEXT: .LBB0_6: @ %for.body.preheader.new
@@ -242,8 +242,8 @@ define arm_aapcs_vfpcc float @fast_float
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB1_2: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vmov q0, q1
+; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q1, [r0]
; CHECK-NEXT: vldrwt.u32 q2, [r1]
Modified: llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll Thu Oct 17 01:46:31 2019
@@ -359,9 +359,9 @@ define arm_aapcs_vfpcc i32 @test_acc_sca
; CHECK-NEXT: .LBB4_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r2
-; CHECK-NEXT: mov r3, r2
; CHECK-NEXT: vpst
; CHECK-NEXT: vldrwt.u32 q2, [r1]
+; CHECK-NEXT: mov r3, r2
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: subs r2, #4
; CHECK-NEXT: vmov q1, q0
@@ -1136,17 +1136,17 @@ define arm_aapcs_vfpcc void @test_vec_mu
; CHECK-NEXT: .LBB9_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r12
-; CHECK-NEXT: sub.w r12, r12, #4
; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q0, [r0]
; CHECK-NEXT: vldrwt.u32 q1, [r1]
-; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: vmul.i32 q0, q1, q0
-; CHECK-NEXT: adds r1, #16
+; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: vadd.i32 q0, q0, r2
; CHECK-NEXT: vpst
; CHECK-NEXT: vstrwt.32 q0, [r3]
+; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: adds r3, #16
+; CHECK-NEXT: sub.w r12, r12, #4
; CHECK-NEXT: le lr, .LBB9_5
; CHECK-NEXT: b .LBB9_11
; CHECK-NEXT: .LBB9_6: @ %for.body.preheader.new
Modified: llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll Thu Oct 17 01:46:31 2019
@@ -1,19 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=armv8.1m.main -mattr=+mve -enable-arm-maskedldst=true -disable-mve-tail-predication=false --verify-machineinstrs %s -o - | FileCheck %s
-; CHECK-LABEL: mul_reduce_add
-; CHECK: dls lr,
-; CHECK: [[LOOP:.LBB[0-9_]+]]:
-; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
-; CHECK: vpstt
-; CHECK-NEXT: vldrwt.u32
-; CHECK-NEXT: vldrwt.u32
-; CHECK: mov [[ELEMS_OUT:r[0-9]+]], [[ELEMS]]
-; CHECK: sub{{.*}} [[ELEMS]], #4
-; CHECK: le lr, [[LOOP]]
-; CHECK: vctp.32 [[ELEMS_OUT]]
-; CHECK: vpsel
-; CHECK: vaddv.u32 r0
define dso_local i32 @mul_reduce_add(i32* noalias nocapture readonly %a, i32* noalias nocapture readonly %b, i32 %N) {
+; CHECK-LABEL: mul_reduce_add:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: itt eq
+; CHECK-NEXT: moveq r0, #0
+; CHECK-NEXT: bxeq lr
+; CHECK-NEXT: push {r7, lr}
+; CHECK-NEXT: adds r3, r2, #3
+; CHECK-NEXT: vmov.i32 q0, #0x0
+; CHECK-NEXT: bic r3, r3, #3
+; CHECK-NEXT: sub.w r12, r3, #4
+; CHECK-NEXT: movs r3, #1
+; CHECK-NEXT: add.w lr, r3, r12, lsr #2
+; CHECK-NEXT: dls lr, lr
+; CHECK-NEXT: .LBB0_1: @ %vector.body
+; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: vmov q1, q0
+; CHECK-NEXT: vctp.32 r2
+; CHECK-NEXT: vpstt
+; CHECK-NEXT: vldrwt.u32 q0, [r0]
+; CHECK-NEXT: vldrwt.u32 q2, [r1]
+; CHECK-NEXT: mov r3, r2
+; CHECK-NEXT: vmul.i32 q0, q2, q0
+; CHECK-NEXT: adds r0, #16
+; CHECK-NEXT: adds r1, #16
+; CHECK-NEXT: subs r2, #4
+; CHECK-NEXT: vadd.i32 q0, q0, q1
+; CHECK-NEXT: le lr, .LBB0_1
+; CHECK-NEXT: @ %bb.2: @ %middle.block
+; CHECK-NEXT: vctp.32 r3
+; CHECK-NEXT: vpsel q0, q0, q1
+; CHECK-NEXT: vaddv.u32 r0, q0
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp8 = icmp eq i32 %N, 0
br i1 %cmp8, label %for.cond.cleanup, label %vector.ph
@@ -55,18 +76,37 @@ for.cond.cleanup:
ret i32 %res.0.lcssa
}
-; CHECK-LABEL: mul_reduce_add_const
-; CHECK: dls lr
-; CHECK: [[LOOP:.LBB[0-9_]+]]:
-; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
-; CHECK: vpst
-; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r0]
-; CHECK: mov [[ELEMS_OUT:r[0-9]+]], [[ELEMS]]
-; CHECK: sub{{.*}} [[ELEMS]], #4
-; CHECK: le lr, [[LOOP]]
-; CHECK: vctp.32 [[ELEMS_OUT]]
-; CHECK: vpsel
define dso_local i32 @mul_reduce_add_const(i32* noalias nocapture readonly %a, i32 %b, i32 %N) {
+; CHECK-LABEL: mul_reduce_add_const:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: itt eq
+; CHECK-NEXT: moveq r0, #0
+; CHECK-NEXT: bxeq lr
+; CHECK-NEXT: push {r7, lr}
+; CHECK-NEXT: adds r1, r2, #3
+; CHECK-NEXT: movs r3, #1
+; CHECK-NEXT: bic r1, r1, #3
+; CHECK-NEXT: vmov.i32 q0, #0x0
+; CHECK-NEXT: subs r1, #4
+; CHECK-NEXT: add.w lr, r3, r1, lsr #2
+; CHECK-NEXT: dls lr, lr
+; CHECK-NEXT: .LBB1_1: @ %vector.body
+; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: mov r1, r2
+; CHECK-NEXT: vctp.32 r2
+; CHECK-NEXT: vmov q1, q0
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrwt.u32 q0, [r0]
+; CHECK-NEXT: adds r0, #16
+; CHECK-NEXT: subs r2, #4
+; CHECK-NEXT: vadd.i32 q0, q0, q1
+; CHECK-NEXT: le lr, .LBB1_1
+; CHECK-NEXT: @ %bb.2: @ %middle.block
+; CHECK-NEXT: vctp.32 r1
+; CHECK-NEXT: vpsel q0, q0, q1
+; CHECK-NEXT: vaddv.u32 r0, q0
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
@@ -104,19 +144,37 @@ for.cond.cleanup:
ret i32 %res.0.lcssa
}
-; CHECK-LABEL: add_reduce_add_const
-; CHECK: dls lr, lr
-; CHECK: [[LOOP:.LBB[0-9_]+]]:
-; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
-; CHECK: vpst
-; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r0]
-; CHECK: mov [[ELEMS_OUT:r[0-9]+]], [[ELEMS]]
-; CHECK: sub{{.*}} [[ELEMS]], #4
-; CHECK: vadd.i32
-; CHECK: le lr, [[LOOP]]
-; CHECK: vctp.32 [[ELEMS_OUT]]
-; CHECK: vpsel
define dso_local i32 @add_reduce_add_const(i32* noalias nocapture readonly %a, i32 %b, i32 %N) {
+; CHECK-LABEL: add_reduce_add_const:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: itt eq
+; CHECK-NEXT: moveq r0, #0
+; CHECK-NEXT: bxeq lr
+; CHECK-NEXT: push {r7, lr}
+; CHECK-NEXT: adds r1, r2, #3
+; CHECK-NEXT: movs r3, #1
+; CHECK-NEXT: bic r1, r1, #3
+; CHECK-NEXT: vmov.i32 q0, #0x0
+; CHECK-NEXT: subs r1, #4
+; CHECK-NEXT: add.w lr, r3, r1, lsr #2
+; CHECK-NEXT: dls lr, lr
+; CHECK-NEXT: .LBB2_1: @ %vector.body
+; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: mov r1, r2
+; CHECK-NEXT: vctp.32 r2
+; CHECK-NEXT: vmov q1, q0
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrwt.u32 q0, [r0]
+; CHECK-NEXT: adds r0, #16
+; CHECK-NEXT: subs r2, #4
+; CHECK-NEXT: vadd.i32 q0, q0, q1
+; CHECK-NEXT: le lr, .LBB2_1
+; CHECK-NEXT: @ %bb.2: @ %middle.block
+; CHECK-NEXT: vctp.32 r1
+; CHECK-NEXT: vpsel q0, q0, q1
+; CHECK-NEXT: vaddv.u32 r0, q0
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
@@ -154,18 +212,33 @@ for.cond.cleanup:
ret i32 %res.0.lcssa
}
-; CHECK-LABEL: vector_mul_const
-; CHECK: dls lr, lr
-; CHECK: [[LOOP:.LBB[0-9_]+]]:
-; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
-; CHECK: sub{{.*}} [[ELEMS]], #4
-; CHECK: vpst
-; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r1]
-; CHECK: vmul.i32
-; CHECK: vpst
-; CHECK-NEXT: vstrwt.32 q{{.*}}, [r0]
-; CHECK: le lr, [[LOOP]]
define dso_local void @vector_mul_const(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %c, i32 %N) {
+; CHECK-LABEL: vector_mul_const:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: push {r7, lr}
+; CHECK-NEXT: cmp r3, #0
+; CHECK-NEXT: it eq
+; CHECK-NEXT: popeq {r7, pc}
+; CHECK-NEXT: add.w r12, r3, #3
+; CHECK-NEXT: mov.w lr, #1
+; CHECK-NEXT: bic r12, r12, #3
+; CHECK-NEXT: sub.w r12, r12, #4
+; CHECK-NEXT: add.w lr, lr, r12, lsr #2
+; CHECK-NEXT: dls lr, lr
+; CHECK-NEXT: .LBB3_1: @ %vector.body
+; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: vctp.32 r3
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrwt.u32 q0, [r1]
+; CHECK-NEXT: vmul.i32 q0, q0, r2
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: adds r1, #16
+; CHECK-NEXT: adds r0, #16
+; CHECK-NEXT: subs r3, #4
+; CHECK-NEXT: le lr, .LBB3_1
+; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
@@ -201,18 +274,33 @@ for.cond.cleanup:
ret void
}
-; CHECK-LABEL: vector_add_const
-; CHECK: dls lr, lr
-; CHECK: [[LOOP:.LBB[0-9_]+]]:
-; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
-; CHECK: sub{{.*}} [[ELEMS]], #4
-; CHECK: vpst
-; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r1]
-; CHECK: vadd.i32
-; CHECK: vpst
-; CHECK-NEXT: vstrwt.32 q{{.*}}, [r0]
-; CHECK: le lr, [[LOOP]]
define dso_local void @vector_add_const(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %c, i32 %N) {
+; CHECK-LABEL: vector_add_const:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: push {r7, lr}
+; CHECK-NEXT: cmp r3, #0
+; CHECK-NEXT: it eq
+; CHECK-NEXT: popeq {r7, pc}
+; CHECK-NEXT: add.w r12, r3, #3
+; CHECK-NEXT: mov.w lr, #1
+; CHECK-NEXT: bic r12, r12, #3
+; CHECK-NEXT: sub.w r12, r12, #4
+; CHECK-NEXT: add.w lr, lr, r12, lsr #2
+; CHECK-NEXT: dls lr, lr
+; CHECK-NEXT: .LBB4_1: @ %vector.body
+; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: vctp.32 r3
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrwt.u32 q0, [r1]
+; CHECK-NEXT: vadd.i32 q0, q0, r2
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: adds r1, #16
+; CHECK-NEXT: adds r0, #16
+; CHECK-NEXT: subs r3, #4
+; CHECK-NEXT: le lr, .LBB4_1
+; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir Thu Oct 17 01:46:31 2019
@@ -65,9 +65,9 @@ body: |
; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q0 {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0
+ ; CHECK: BUNDLE implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q0 {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir Thu Oct 17 01:46:31 2019
@@ -68,10 +68,10 @@ body: |
; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, internal renamable $vpr, killed renamable $q0
- ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, internal killed renamable $vpr, killed renamable $q1
+ ; CHECK: BUNDLE implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
; CHECK: }
; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
; CHECK: tBX_RET 14, $noreg, implicit $q0
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir Thu Oct 17 01:46:31 2019
@@ -69,12 +69,12 @@ body: |
; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
- ; CHECK: MVE_VPST 1, implicit-def $vpr
- ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, internal renamable $vpr, undef renamable $q2
- ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, internal renamable $vpr, internal undef renamable $q2
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, internal renamable $vpr, killed renamable $q0
- ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, internal killed renamable $vpr, killed renamable $q1
+ ; CHECK: BUNDLE implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
+ ; CHECK: MVE_VPST 1, implicit $vpr
+ ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
+ ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, renamable $vpr, internal undef renamable $q2
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
; CHECK: }
; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
; CHECK: tBX_RET 14, $noreg, implicit $q0
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir Thu Oct 17 01:46:31 2019
@@ -70,16 +70,16 @@ body: |
; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q2, implicit $q3, implicit killed $q0 {
- ; CHECK: MVE_VPST 1, implicit-def $vpr
- ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, internal renamable $vpr, undef renamable $q2
- ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, internal renamable $vpr, internal undef renamable $q2
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, internal renamable $vpr, killed renamable $q0
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, renamable $q3, 1, internal renamable $vpr, internal undef renamable $q0
+ ; CHECK: BUNDLE implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit $vpr, implicit killed $q2, implicit $q3, implicit killed $q0 {
+ ; CHECK: MVE_VPST 1, implicit $vpr
+ ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
+ ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, renamable $vpr, internal undef renamable $q2
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, renamable $q3, 1, renamable $vpr, internal undef renamable $q0
; CHECK: }
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q0, implicit killed $q3, implicit killed $q1 {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, internal killed renamable $vpr, killed renamable $q1
+ ; CHECK: BUNDLE implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q0, implicit killed $q3, implicit killed $q1 {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
; CHECK: }
; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
; CHECK: tBX_RET 14, $noreg, implicit $q0
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir Thu Oct 17 01:46:31 2019
@@ -68,16 +68,16 @@ body: |
; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
- ; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q1, implicit $q2, implicit killed $q3 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3
- ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, internal renamable $vpr, undef renamable $q1
+ ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, renamable $vpr, undef renamable $q1
; CHECK: }
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0
+ ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir Thu Oct 17 01:46:31 2019
@@ -68,14 +68,14 @@ body: |
; CHECK: liveins: $q0, $q1, $q2, $r0, $r1
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit killed $q1, implicit $q2, implicit killed $q3 {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal killed renamable $vpr, killed renamable $q3
+ ; CHECK: BUNDLE implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit killed $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, killed renamable $vpr, killed renamable $q3
; CHECK: }
; CHECK: $vpr = VMSR_P0 killed $r1, 14, $noreg
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q3, implicit killed $q2, implicit killed $q0 {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0
+ ; CHECK: BUNDLE implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q3, implicit killed $q2, implicit killed $q0 {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block7.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block7.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block7.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block7.mir Thu Oct 17 01:46:31 2019
@@ -69,17 +69,17 @@ body: |
; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
- ; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q1, implicit $q2, implicit killed $q3 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3
- ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, internal renamable $vpr, undef renamable $q1
+ ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, renamable $vpr, undef renamable $q1
; CHECK: }
; CHECK: bb.1.bb2:
; CHECK: liveins: $q0, $q1, $q2, $q3, $vpr
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0
+ ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0
bb.0.entry:
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block8.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block8.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block8.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block8.mir Thu Oct 17 01:46:31 2019
@@ -68,20 +68,20 @@ body: |
; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
- ; CHECK: BUNDLE implicit-def $vpr, implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit killed $q1, implicit $q2, implicit killed $q3 {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3
+ ; CHECK: BUNDLE implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q3, implicit undef $q1 {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, internal renamable $vpr, undef renamable $q1
+ ; CHECK: BUNDLE implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit $vpr, implicit killed $q3, implicit undef $q1 {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, renamable $vpr, undef renamable $q1
; CHECK: }
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
- ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3
- ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0
+ ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg
Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-nots.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-nots.mir?rev=375087&r1=375086&r2=375087&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-nots.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-nots.mir Thu Oct 17 01:46:31 2019
@@ -66,9 +66,9 @@ body: |
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0
@@ -100,9 +100,9 @@ body: |
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: bb.1.bb2:
; CHECK: liveins: $q0, $q1, $q2, $vpr
- ; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0
@@ -141,9 +141,9 @@ body: |
; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0
@@ -179,9 +179,9 @@ body: |
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0
@@ -213,9 +213,9 @@ body: |
; CHECK: liveins: $q0, $q1, $q2
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit $q1, implicit $zr, implicit killed $q2 {
- ; CHECK: MVE_VPST 4, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit $q1, implicit $zr, implicit killed $q2 {
+ ; CHECK: MVE_VPST 4, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
@@ -244,14 +244,14 @@ body: |
; CHECK: liveins: $q0, $q1, $q2
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit $q1, implicit $zr {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit $q1, implicit $zr {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
- ; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr {
- ; CHECK: MVE_VPST 8, implicit-def $vpr
- ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
+ ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
+ ; CHECK: MVE_VPST 8, implicit $vpr
+ ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
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