[PATCH] D68984: [MIPS GlobalISel] Select MSA vector generic and builtin add

Petar Avramovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 15 06:31:57 PDT 2019


Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: atanasyan, petarj.
Herald added subscribers: llvm-commits, jrtc27, arichardson, rovka, sdardis.
Herald added a project: LLVM.

Select vector G_ADD for MIPS32 with MSA. We have to set bank
for vector operands to fprb and selectImpl will do the rest.
__builtin_msa_addv_<format> will be transformed into G_ADD
in legalizeIntrinsic and selected in the same way.
__builtin_msa_addvi_<format> will be directly selected into
ADDVI_<format> in legalizeIntrinsic. MIR tests for it have
unnecessary additional copies. Capture current state of tests
with run-pass=legalizer with a test in test/CodeGen/MIR/Mips.


Repository:
  rL LLVM

https://reviews.llvm.org/D68984

Files:
  lib/Target/Mips/MipsLegalizerInfo.cpp
  lib/Target/Mips/MipsRegisterBankInfo.cpp
  test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll
  test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
  test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir
  test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir
  test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
  test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll
  test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir

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