[PATCH] D68828: [AMDGPU] Allow DPP combiner to work with REG_SEQUENCE

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 14 10:24:49 PDT 2019


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:356
   auto DPPMovReg = DstOpnd->getReg();
+  auto DPPMovSubReg = DstOpnd->getSubReg();
   if (execMayBeModifiedBeforeAnyUse(*MRI, DPPMovReg, MovMI)) {
----------------
vpykhtin wrote:
> How mov can define subreg in the SSA?
That is not necessarily a mov anymore, it can be a reg_sequence operand now. But I guess this is part of older patch, because all reg_sequences are processed inside this function now. I probably need to remove it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68828/new/

https://reviews.llvm.org/D68828





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