[llvm] r374828 - [InstCombine] fold a shifted bool zext to a select

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 14 14:56:40 PDT 2019


Author: spatel
Date: Mon Oct 14 14:56:40 2019
New Revision: 374828

URL: http://llvm.org/viewvc/llvm-project?rev=374828&view=rev
Log:
[InstCombine] fold a shifted bool zext to a select

For a constant shift amount, add the following fold.
shl (zext (i1 X)), ShAmt --> select (X, 1 << ShAmt, 0)

https://rise4fun.com/Alive/IZ9

Fixes PR42257.

Based on original patch by @zvi (Zvi Rackover)

Differential Revision: https://reviews.llvm.org/D63382

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/trunk/test/Transforms/InstCombine/and.ll
    llvm/trunk/test/Transforms/InstCombine/shift.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=374828&r1=374827&r2=374828&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Mon Oct 14 14:56:40 2019
@@ -934,6 +934,12 @@ Instruction *InstCombiner::visitShl(Bina
     return BinaryOperator::CreateLShr(
         ConstantInt::get(Ty, APInt::getSignMask(BitWidth)), X);
 
+  // shl (zext (i1 X)), C1 --> select (X, 1 << C1, 0)
+  if (match(Op0, m_ZExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1)) {
+    auto *NewC = ConstantExpr::getShl(ConstantInt::get(Ty, 1), C1);
+    return SelectInst::Create(X, NewC, ConstantInt::getNullValue(Ty));
+  }
+
   return nullptr;
 }
 

Modified: llvm/trunk/test/Transforms/InstCombine/and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and.ll?rev=374828&r1=374827&r2=374828&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/and.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/and.ll Mon Oct 14 14:56:40 2019
@@ -346,8 +346,7 @@ define i32 @test30(i1 %X) {
 
 define i32 @test31(i1 %X) {
 ; CHECK-LABEL: @test31(
-; CHECK-NEXT:    [[Y:%.*]] = zext i1 %X to i32
-; CHECK-NEXT:    [[Z:%.*]] = shl nuw nsw i32 [[Y]], 4
+; CHECK-NEXT:    [[Z:%.*]] = select i1 [[X:%.*]], i32 16, i32 0
 ; CHECK-NEXT:    ret i32 [[Z]]
 ;
   %Y = zext i1 %X to i32

Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=374828&r1=374827&r2=374828&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shift.ll Mon Oct 14 14:56:40 2019
@@ -1181,8 +1181,7 @@ define <2 x i65> @test_63(<2 x i64> %t)
 
 define i32 @test_shl_zext_bool(i1 %t) {
 ; CHECK-LABEL: @test_shl_zext_bool(
-; CHECK-NEXT:    [[EXT:%.*]] = zext i1 [[T:%.*]] to i32
-; CHECK-NEXT:    [[SHL:%.*]] = shl nuw nsw i32 [[EXT]], 2
+; CHECK-NEXT:    [[SHL:%.*]] = select i1 [[T:%.*]], i32 4, i32 0
 ; CHECK-NEXT:    ret i32 [[SHL]]
 ;
   %ext = zext i1 %t to i32
@@ -1192,8 +1191,7 @@ define i32 @test_shl_zext_bool(i1 %t) {
 
 define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) {
 ; CHECK-LABEL: @test_shl_zext_bool_splat(
-; CHECK-NEXT:    [[EXT:%.*]] = zext <2 x i1> [[T:%.*]] to <2 x i32>
-; CHECK-NEXT:    [[SHL:%.*]] = shl nuw nsw <2 x i32> [[EXT]], <i32 3, i32 3>
+; CHECK-NEXT:    [[SHL:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 8, i32 8>, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[SHL]]
 ;
   %ext = zext <2 x i1> %t to <2 x i32>
@@ -1203,8 +1201,7 @@ define <2 x i32> @test_shl_zext_bool_spl
 
 define <2 x i32> @test_shl_zext_bool_vec(<2 x i1> %t) {
 ; CHECK-LABEL: @test_shl_zext_bool_vec(
-; CHECK-NEXT:    [[EXT:%.*]] = zext <2 x i1> [[T:%.*]] to <2 x i32>
-; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> [[EXT]], <i32 2, i32 3>
+; CHECK-NEXT:    [[SHL:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 4, i32 8>, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[SHL]]
 ;
   %ext = zext <2 x i1> %t to <2 x i32>




More information about the llvm-commits mailing list