[PATCH] D68828: [AMDGPU] Allow DPP combiner to work with REG_SEQUENCE

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec marked an inline comment as done.
rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:420
   SmallVector<MachineInstr*, 4> OrigMIs, DPPMIs;
+  SmallSetVector<MachineInstr*, 4> RegSeqs;
   auto CombOldVGPR = getRegSubRegPair(*OldOpnd);
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arsenm wrote:
> Why is this a SetVector?
I will try to add if several times, for each subreg. Thus set. I guess it can be just SmallSet though.


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  https://reviews.llvm.org/D68828/new/

https://reviews.llvm.org/D68828