[PATCH] D68895: AMDGPU: Erase redundant redefs of m0 in SIFoldOperands

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, kerbowa, tstellar.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

Only handle simple inter-block redefs of m0 to the same value. This
avoids interference from redefs of m0 in SILoadStoreOptimzer. I was
initially teaching that pass to ignore redefs of m0, but having them
not exist beforehand is much simpler.

      

This is in preparation for deleting the current special m0 handling in
SIFixSGPRCopies to allow the register coalescer to handle the
difficult cases.


https://reviews.llvm.org/D68895

Files:
  lib/Target/AMDGPU/SIFoldOperands.cpp
  test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir

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