[PATCH] D68776: [mips] Fix loading "double" immediate into a GPR and FPR

Simon Atanasyan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 11 04:51:03 PDT 2019


atanasyan marked 2 inline comments as done.
atanasyan added inline comments.


================
Comment at: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3481
+
+    if (isABI_N32() || isABI_N64()) {
+      if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, true, IDLoc,
----------------
mstojanovic wrote:
> An alternative to this condition could be `isGP64bit()`. Do you think there's a case where this wouldn't work and what do you prefer?
I'm going to fix that and other similar code by a separate patch.


================
Comment at: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3482
+    if (isABI_N32() || isABI_N64()) {
+      if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, true, IDLoc,
+                        Out, STI))
----------------
mstojanovic wrote:
> Is there a reason why the `IsAddress` argument is set to `true` in the `loadImmediate()` call?
Good point, thanks. I missed that and just use the same value for this argument as in the original code. I think in both `loadImmediate` calls `IsAddress` should be `false`. I will fix that before commit.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68776/new/

https://reviews.llvm.org/D68776





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