[PATCH] D68793: [System Model] [TTI] Add TTI interfaces for write-combining buffers

[David Greene via Phabricator via llvm-commits]

greened added a comment.



> we might say something like:
> 
>   \return the number of write-combining buffers. A write-combining buffer is a per-core resource used for collecting writes to a particular cache line before further processing those writes using other parts of the memory subsystem.

Will do.

> we already have getCacheLineSize(), so we know how big that is, but we don't currently have a way to account for how many hardware threads per core, right? Don't we need that to estimate how many write-combining buffers we get for the current hardware thread? (Presumably, we'd want the same thing to use the total-cache-size functions too, because we need to generate code assuming a working-set size per thread?)

This is something that will become available once more bits of the system model are implemented.  The model can specify things like number of cores and threads per core.  The subtarget will be able to examine its execution resource configuration and return an appropriate number.  After this patch makes it through I will be in a place where I can start posting the TableGen changes to generate models and then post the TableGen model classes after that.  At that point targets can define their own models and away we go.

> The Intel optimization guide talks about using this number to drive loop distribution, where we don't update more arrays (cache lines) at a time than can fit into the thread's WC buffers. Is this what you had in mind?

Yes.  It's useful for anything that cares about performance of writes to memory.


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https://reviews.llvm.org/D68793