[PATCH] D68778: [mips] Store 64-bit `li.d' operand as a single 8-byte value

[Simon Atanasyan via Phabricator via llvm-commits]

atanasyan created this revision.
atanasyan added reviewers: Petar.Avramovic, petarj, mbrkusanin, mstojanovic.
Herald added subscribers: jrtc27, hiraditya, arichardson, sdardis.
Herald added a project: LLVM.
atanasyan added a parent revision: D68777: [mips] Use less instruction to load zero into FPR by li.s / li.d pseudos.

Now assembler generates two consecutive `.4byte` directives to store 64-bit `li.d' operand. The first directive stores high 4-byte of the value. The second directive stores low 4-byte of the value. But on 64-bit system we load this value at once and get wrong result if the system is little-endian.

This patch fixes the bug. It stores the `li.d' operand as a single 8-byte value.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D68778

Files:
  llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  llvm/test/MC/Mips/macro-li.d.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D68778.224302.patch
Type: text/x-patch
Size: 10668 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191010/13881803/attachment.bin>