[PATCH] D68690: AMDGPU/SILoadStoreOptimizer: fix a likely bug introduced recently

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle created this revision.
nhaehnle added a reviewer: tstellar.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.
nhaehnle added a parent revision: D65961: AMDGPU/SILoadStoreOptimizer: Optimize scanning for mergeable instructions.

We should check for same instruction class before checking whether they
have the same base address, else we might iterate out of bounds of a
MachineInstr operands list. The InstClass check is also cheaper.

This was introduced in SVN r373630.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D68690

Files:
  llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp


Index: llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -1512,8 +1512,8 @@
 void SILoadStoreOptimizer::addInstToMergeableList(const CombineInfo &CI,
                  std::list<std::list<CombineInfo> > &MergeableInsts) const {
   for (std::list<CombineInfo> &AddrList : MergeableInsts) {
-    if (AddrList.front().hasSameBaseAddress(*CI.I) &&
-        AddrList.front().InstClass == CI.InstClass) {
+    if (AddrList.front().InstClass == CI.InstClass &&
+        AddrList.front().hasSameBaseAddress(*CI.I)) {
       AddrList.emplace_back(CI);
       return;
     }


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