[lld] r373884 - [ELF][MIPS] Use lld::elf::{read, write}* instead of llvm::support::endian::{read, write}*
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 7 01:30:46 PDT 2019
Author: maskray
Date: Mon Oct 7 01:30:46 2019
New Revision: 373884
URL: http://llvm.org/viewvc/llvm-project?rev=373884&view=rev
Log:
[ELF][MIPS] Use lld::elf::{read,write}* instead of llvm::support::endian::{read,write}*
This allows us to delete `using namespace llvm::support::endian` and
simplify D68323. This change adds runtime config->endianness check but
the overhead should be negligible.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D68561
Modified:
lld/trunk/ELF/Arch/Mips.cpp
Modified: lld/trunk/ELF/Arch/Mips.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/Mips.cpp?rev=373884&r1=373883&r2=373884&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/Mips.cpp (original)
+++ lld/trunk/ELF/Arch/Mips.cpp Mon Oct 7 01:30:46 2019
@@ -14,11 +14,9 @@
#include "Thunks.h"
#include "lld/Common/ErrorHandler.h"
#include "llvm/Object/ELF.h"
-#include "llvm/Support/Endian.h"
using namespace llvm;
using namespace llvm::object;
-using namespace llvm::support::endian;
using namespace llvm::ELF;
using namespace lld;
using namespace lld::elf;
@@ -199,7 +197,7 @@ void MIPS<ELFT>::writeGotPlt(uint8_t *bu
uint64_t va = in.plt->getVA();
if (isMicroMips())
va |= 1;
- write32<ELFT::TargetEndianness>(buf, va);
+ write32(buf, va);
}
template <endianness E> static uint32_t readShuffle(const uint8_t *loc) {
@@ -209,7 +207,7 @@ template <endianness E> static uint32_t
// as early as possible. To do so, little-endian binaries keep 16-bit
// words in a big-endian order. That is why we have to swap these
// words to get a correct value.
- uint32_t v = read32<E>(loc);
+ uint32_t v = read32(loc);
if (E == support::little)
return (v << 16) | (v >> 16);
return v;
@@ -218,10 +216,10 @@ template <endianness E> static uint32_t
template <endianness E>
static void writeValue(uint8_t *loc, uint64_t v, uint8_t bitsSize,
uint8_t shift) {
- uint32_t instr = read32<E>(loc);
+ uint32_t instr = read32(loc);
uint32_t mask = 0xffffffff >> (32 - bitsSize);
uint32_t data = (instr & ~mask) | ((v >> shift) & mask);
- write32<E>(loc, data);
+ write32(loc, data);
}
template <endianness E>
@@ -241,10 +239,10 @@ static void writeShuffleValue(uint8_t *l
template <endianness E>
static void writeMicroRelocation16(uint8_t *loc, uint64_t v, uint8_t bitsSize,
uint8_t shift) {
- uint16_t instr = read16<E>(loc);
+ uint16_t instr = read16(loc);
uint16_t mask = 0xffff >> (16 - bitsSize);
uint16_t data = (instr & ~mask) | ((v >> shift) & mask);
- write16<E>(loc, data);
+ write16(loc, data);
}
template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
@@ -255,53 +253,53 @@ template <class ELFT> void MIPS<ELFT>::w
// Overwrite trap instructions written by Writer::writeTrapInstr.
memset(buf, 0, pltHeaderSize);
- write16<e>(buf, isMipsR6() ? 0x7860 : 0x7980); // addiupc v1, (GOTPLT) - .
- write16<e>(buf + 4, 0xff23); // lw $25, 0($3)
- write16<e>(buf + 8, 0x0535); // subu16 $2, $2, $3
- write16<e>(buf + 10, 0x2525); // srl16 $2, $2, 2
- write16<e>(buf + 12, 0x3302); // addiu $24, $2, -2
- write16<e>(buf + 14, 0xfffe);
- write16<e>(buf + 16, 0x0dff); // move $15, $31
+ write16(buf, isMipsR6() ? 0x7860 : 0x7980); // addiupc v1, (GOTPLT) - .
+ write16(buf + 4, 0xff23); // lw $25, 0($3)
+ write16(buf + 8, 0x0535); // subu16 $2, $2, $3
+ write16(buf + 10, 0x2525); // srl16 $2, $2, 2
+ write16(buf + 12, 0x3302); // addiu $24, $2, -2
+ write16(buf + 14, 0xfffe);
+ write16(buf + 16, 0x0dff); // move $15, $31
if (isMipsR6()) {
- write16<e>(buf + 18, 0x0f83); // move $28, $3
- write16<e>(buf + 20, 0x472b); // jalrc $25
- write16<e>(buf + 22, 0x0c00); // nop
+ write16(buf + 18, 0x0f83); // move $28, $3
+ write16(buf + 20, 0x472b); // jalrc $25
+ write16(buf + 22, 0x0c00); // nop
relocateOne(buf, R_MICROMIPS_PC19_S2, gotPlt - plt);
} else {
- write16<e>(buf + 18, 0x45f9); // jalrc $25
- write16<e>(buf + 20, 0x0f83); // move $28, $3
- write16<e>(buf + 22, 0x0c00); // nop
+ write16(buf + 18, 0x45f9); // jalrc $25
+ write16(buf + 20, 0x0f83); // move $28, $3
+ write16(buf + 22, 0x0c00); // nop
relocateOne(buf, R_MICROMIPS_PC23_S2, gotPlt - plt);
}
return;
}
if (config->mipsN32Abi) {
- write32<e>(buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
- write32<e>(buf + 4, 0x8dd90000); // lw $25, %lo(&GOTPLT[0])($14)
- write32<e>(buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
- write32<e>(buf + 12, 0x030ec023); // subu $24, $24, $14
- write32<e>(buf + 16, 0x03e07825); // move $15, $31
- write32<e>(buf + 20, 0x0018c082); // srl $24, $24, 2
+ write32(buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
+ write32(buf + 4, 0x8dd90000); // lw $25, %lo(&GOTPLT[0])($14)
+ write32(buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
+ write32(buf + 12, 0x030ec023); // subu $24, $24, $14
+ write32(buf + 16, 0x03e07825); // move $15, $31
+ write32(buf + 20, 0x0018c082); // srl $24, $24, 2
} else if (ELFT::Is64Bits) {
- write32<e>(buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
- write32<e>(buf + 4, 0xddd90000); // ld $25, %lo(&GOTPLT[0])($14)
- write32<e>(buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
- write32<e>(buf + 12, 0x030ec023); // subu $24, $24, $14
- write32<e>(buf + 16, 0x03e07825); // move $15, $31
- write32<e>(buf + 20, 0x0018c0c2); // srl $24, $24, 3
+ write32(buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
+ write32(buf + 4, 0xddd90000); // ld $25, %lo(&GOTPLT[0])($14)
+ write32(buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
+ write32(buf + 12, 0x030ec023); // subu $24, $24, $14
+ write32(buf + 16, 0x03e07825); // move $15, $31
+ write32(buf + 20, 0x0018c0c2); // srl $24, $24, 3
} else {
- write32<e>(buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
- write32<e>(buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
- write32<e>(buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0])
- write32<e>(buf + 12, 0x031cc023); // subu $24, $24, $28
- write32<e>(buf + 16, 0x03e07825); // move $15, $31
- write32<e>(buf + 20, 0x0018c082); // srl $24, $24, 2
+ write32(buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
+ write32(buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
+ write32(buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0])
+ write32(buf + 12, 0x031cc023); // subu $24, $24, $28
+ write32(buf + 16, 0x03e07825); // move $15, $31
+ write32(buf + 20, 0x0018c082); // srl $24, $24, 2
}
uint32_t jalrInst = config->zHazardplt ? 0x0320fc09 : 0x0320f809;
- write32<e>(buf + 24, jalrInst); // jalr.hb $25 or jalr $25
- write32<e>(buf + 28, 0x2718fffe); // subu $24, $24, 2
+ write32(buf + 24, jalrInst); // jalr.hb $25 or jalr $25
+ write32(buf + 28, 0x2718fffe); // subu $24, $24, 2
uint64_t gotPlt = in.gotPlt->getVA();
writeValue<e>(buf, gotPlt + 0x8000, 16, 16);
@@ -319,16 +317,16 @@ void MIPS<ELFT>::writePlt(uint8_t *buf,
memset(buf, 0, pltEntrySize);
if (isMipsR6()) {
- write16<e>(buf, 0x7840); // addiupc $2, (GOTPLT) - .
- write16<e>(buf + 4, 0xff22); // lw $25, 0($2)
- write16<e>(buf + 8, 0x0f02); // move $24, $2
- write16<e>(buf + 10, 0x4723); // jrc $25 / jr16 $25
+ write16(buf, 0x7840); // addiupc $2, (GOTPLT) - .
+ write16(buf + 4, 0xff22); // lw $25, 0($2)
+ write16(buf + 8, 0x0f02); // move $24, $2
+ write16(buf + 10, 0x4723); // jrc $25 / jr16 $25
relocateOne(buf, R_MICROMIPS_PC19_S2, gotPltEntryAddr - pltEntryAddr);
} else {
- write16<e>(buf, 0x7900); // addiupc $2, (GOTPLT) - .
- write16<e>(buf + 4, 0xff22); // lw $25, 0($2)
- write16<e>(buf + 8, 0x4599); // jrc $25 / jr16 $25
- write16<e>(buf + 10, 0x0f02); // move $24, $2
+ write16(buf, 0x7900); // addiupc $2, (GOTPLT) - .
+ write16(buf + 4, 0xff22); // lw $25, 0($2)
+ write16(buf + 8, 0x4599); // jrc $25 / jr16 $25
+ write16(buf + 10, 0x0f02); // move $24, $2
relocateOne(buf, R_MICROMIPS_PC23_S2, gotPltEntryAddr - pltEntryAddr);
}
return;
@@ -339,10 +337,10 @@ void MIPS<ELFT>::writePlt(uint8_t *buf,
: (config->zHazardplt ? 0x03200408 : 0x03200008);
uint32_t addInst = ELFT::Is64Bits ? 0x65f80000 : 0x25f80000;
- write32<e>(buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
- write32<e>(buf + 4, loadInst); // l[wd] $25, %lo(.got.plt entry)($15)
- write32<e>(buf + 8, jrInst); // jr $25 / jr.hb $25
- write32<e>(buf + 12, addInst); // [d]addiu $24, $15, %lo(.got.plt entry)
+ write32(buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
+ write32(buf + 4, loadInst); // l[wd] $25, %lo(.got.plt entry)($15)
+ write32(buf + 8, jrInst); // jr $25 / jr.hb $25
+ write32(buf + 12, addInst); // [d]addiu $24, $15, %lo(.got.plt entry)
writeValue<e>(buf, gotPltEntryAddr + 0x8000, 16, 16);
writeValue<e>(buf + 4, gotPltEntryAddr, 16, 0);
writeValue<e>(buf + 12, gotPltEntryAddr, 16, 0);
@@ -379,16 +377,16 @@ int64_t MIPS<ELFT>::getImplicitAddend(co
case R_MIPS_GPREL32:
case R_MIPS_TLS_DTPREL32:
case R_MIPS_TLS_TPREL32:
- return SignExtend64<32>(read32<e>(buf));
+ return SignExtend64<32>(read32(buf));
case R_MIPS_26:
// FIXME (simon): If the relocation target symbol is not a PLT entry
// we should use another expression for calculation:
// ((A << 2) | (P & 0xf0000000)) >> 2
- return SignExtend64<28>(read32<e>(buf) << 2);
+ return SignExtend64<28>(read32(buf) << 2);
case R_MIPS_GOT16:
case R_MIPS_HI16:
case R_MIPS_PCHI16:
- return SignExtend64<16>(read32<e>(buf)) << 16;
+ return SignExtend64<16>(read32(buf)) << 16;
case R_MIPS_GPREL16:
case R_MIPS_LO16:
case R_MIPS_PCLO16:
@@ -396,7 +394,7 @@ int64_t MIPS<ELFT>::getImplicitAddend(co
case R_MIPS_TLS_DTPREL_LO16:
case R_MIPS_TLS_TPREL_HI16:
case R_MIPS_TLS_TPREL_LO16:
- return SignExtend64<16>(read32<e>(buf));
+ return SignExtend64<16>(read32(buf));
case R_MICROMIPS_GOT16:
case R_MICROMIPS_HI16:
return SignExtend64<16>(readShuffle<e>(buf)) << 16;
@@ -410,21 +408,21 @@ int64_t MIPS<ELFT>::getImplicitAddend(co
case R_MICROMIPS_GPREL7_S2:
return SignExtend64<9>(readShuffle<e>(buf) << 2);
case R_MIPS_PC16:
- return SignExtend64<18>(read32<e>(buf) << 2);
+ return SignExtend64<18>(read32(buf) << 2);
case R_MIPS_PC19_S2:
- return SignExtend64<21>(read32<e>(buf) << 2);
+ return SignExtend64<21>(read32(buf) << 2);
case R_MIPS_PC21_S2:
- return SignExtend64<23>(read32<e>(buf) << 2);
+ return SignExtend64<23>(read32(buf) << 2);
case R_MIPS_PC26_S2:
- return SignExtend64<28>(read32<e>(buf) << 2);
+ return SignExtend64<28>(read32(buf) << 2);
case R_MIPS_PC32:
- return SignExtend64<32>(read32<e>(buf));
+ return SignExtend64<32>(read32(buf));
case R_MICROMIPS_26_S1:
return SignExtend64<27>(readShuffle<e>(buf) << 1);
case R_MICROMIPS_PC7_S1:
- return SignExtend64<8>(read16<e>(buf) << 1);
+ return SignExtend64<8>(read16(buf) << 1);
case R_MICROMIPS_PC10_S1:
- return SignExtend64<11>(read16<e>(buf) << 1);
+ return SignExtend64<11>(read16(buf) << 1);
case R_MICROMIPS_PC16_S1:
return SignExtend64<17>(readShuffle<e>(buf) << 1);
case R_MICROMIPS_PC18_S3:
@@ -494,7 +492,7 @@ static uint64_t fixupCrossModeJump(uint8
switch (type) {
case R_MIPS_26: {
- uint32_t inst = read32<e>(loc) >> 26;
+ uint32_t inst = read32(loc) >> 26;
if (inst == 0x3 || inst == 0x1d) { // JAL or JALX
writeValue<e>(loc, 0x1d << 26, 32, 0);
return val;
@@ -552,12 +550,12 @@ void MIPS<ELFT>::relocateOne(uint8_t *lo
case R_MIPS_GPREL32:
case R_MIPS_TLS_DTPREL32:
case R_MIPS_TLS_TPREL32:
- write32<e>(loc, val);
+ write32(loc, val);
break;
case R_MIPS_64:
case R_MIPS_TLS_DTPREL64:
case R_MIPS_TLS_TPREL64:
- write64<e>(loc, val);
+ write64(loc, val);
break;
case R_MIPS_26:
writeValue<e>(loc, val, 26, 2);
@@ -643,12 +641,12 @@ void MIPS<ELFT>::relocateOne(uint8_t *lo
// Replace jalr/jr instructions by bal/b if the target
// offset fits into the 18-bit range.
if (isInt<18>(val)) {
- switch (read32<e>(loc)) {
+ switch (read32(loc)) {
case 0x0320f809: // jalr $25 => bal sym
- write32<e>(loc, 0x04110000 | ((val >> 2) & 0xffff));
+ write32(loc, 0x04110000 | ((val >> 2) & 0xffff));
break;
case 0x03200008: // jr $25 => b sym
- write32<e>(loc, 0x10000000 | ((val >> 2) & 0xffff));
+ write32(loc, 0x10000000 | ((val >> 2) & 0xffff));
break;
}
}
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