[PATCH] D68290: [RISCV] WIP better estimate size of outlined block with C extension enabled

Ana Pazos via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 4 15:51:49 PDT 2019


apazos marked an inline comment as done.
apazos added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoC.td:141
+def simm9_lsb0 : Operand<OtherVT>,
+                 ImmLeaf<XLenVT, [{return isShiftedUInt<8, 1>(Imm);}]> {
   let ParserMatchClass = SImmAsmOperand<9, "Lsb0">;
----------------
just noted a copy/paste error: I used isShiftedUInt, instead of isShiftedInt  in both simm9_lsb0 and simm12_lsb0. Will fix it when committing the change.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68290/new/

https://reviews.llvm.org/D68290





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