[PATCH] D68349: [AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa opcodes

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG434d59250e38: [AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa… (authored by dp).
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Changed prior to commit:
  https://reviews.llvm.org/D68349?vs=222874&id=223198#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68349/new/

https://reviews.llvm.org/D68349

Files:
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt


Index: llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt
===================================================================
--- /dev/null
+++ llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
+
+# W32: v_cmp_class_f16_sdwa ttmp14, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06]
+# W64: v_cmp_class_f16_sdwa ttmp[14:15], v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06]
+0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06
Index: llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -1173,7 +1173,8 @@
 
     int TTmpIdx = getTTmpIdx(Val);
     if (TTmpIdx >= 0) {
-      return createSRegOperand(getTtmpClassId(OPW64), TTmpIdx);
+      auto TTmpClsId = getTtmpClassId(IsWave64 ? OPW64 : OPW32);
+      return createSRegOperand(TTmpClsId, TTmpIdx);
     } else if (Val > SGPR_MAX) {
       return IsWave64 ? decodeSpecialReg64(Val)
                       : decodeSpecialReg32(Val);


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