[PATCH] D68374: [X86] Add v32i8 shuffle lowering strategy to recognize two v4i64 vectors truncated to v4i8 and concatenated into the lower 8 bytes with undef/zero upper bytes.

[Craig Topper via Phabricator via llvm-commits]

craig.topper marked an inline comment as done.
craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:15538
+  // Remaining elements need to be zeroable.
+  if (Zeroable.countLeadingOnes() < (Mask.size() - 8))
+    return SDValue();
----------------
I went with an approach that relied less on having two magic numbers mentioned. I wrote its in terms of Mask.size() even though we know that's 32 so that only the 8 that was already use above was mentioned again.


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  https://reviews.llvm.org/D68374/new/

https://reviews.llvm.org/D68374