[PATCH] D67148: [LoopVectorize][PowerPC] Estimate int and float register pressure separately in loop-vectorize

Nicolai Hähnle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 30 10:54:45 PDT 2019


nhaehnle added inline comments.


================
Comment at: llvm/include/llvm/Analysis/TargetTransformInfo.h:801
+  /// return the target-provided register class for the provided type.
+  unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const;
+
----------------
hfinkel wrote:
> wuzish wrote:
> > arsenm wrote:
> > > I don't like spreading the concept of register classes corresponding to types.
> > > 
> > > I also don't think register classes as a concept should be leaking out to the IR
> > I think it's not the concept of register class in backend. It's an abstraction of register class in backend and just to classify and distinguish different kinds of data residing in different register position to help estimate register pressure.
> Yeah, I think that it's pretty important that these are *abstract* register classes - used to establish the mapping between the types of IR values and the number of simultaneous live ranges to which we'd like to limit for some set of those types - it's probably worth stating that explicitly in the description.
Can we explicitly call out the fact that these are not the CodeGen register classes?

Also, how about making the interface a `getRegisterClassForValue` as opposed to `getRegisterClassForType`? This would allow a context-sensitive determination of register classes. Specifically, in the AMDGPU backend, it would potentially allow us to distinguish between uniform and divergent values (in the overall program sense).


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  https://reviews.llvm.org/D67148/new/

https://reviews.llvm.org/D67148





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