[PATCH] D68232: [DAGCombine] Match a greater range of rotate when not all bits are demanded.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix marked an inline comment as done.
deadalnix added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:548
+    SDValue MatchRotate(SDValue LHS, SDValue RHS, const SDLoc &DL);
+    SDValue MatchRotate(SDValue LHS, SDValue RHS, const SDLoc &DL,
+                        const APInt &DemandedBits);
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RKSimon wrote:
> The change to returning SDValue looks like an NFC that you can do right away?
I can do that, indeed. Let me land this part and rebase.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68232/new/

https://reviews.llvm.org/D68232