[PATCH] D68098: [AArch64][SVE] Adding patterns for floating point SVE add instructions.

Ehsan Amiri via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 28 18:06:50 PDT 2019


amehsan added inline comments.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:1218
+                      ZPRRegOp zprty,
+                      ValueType vt, ValueType vt2, SDPatternOperator op>
 : I<(outs zprty:$Zd), (ins  zprty:$Zn, zprty:$Zm),
----------------
Just realized that I forgot to check if we really need two distinct ValueType here or not. I will check that and remove it if not needed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68098/new/

https://reviews.llvm.org/D68098





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