[PATCH] D67438: [InstCombine] Range metadata for ARM MVE VMIN/VMAX.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

This is because the Rda parameter of a vminv is treated as being the same size as the elements? Not as a 32bit integer.

Is is possible to do the same thing in DAG combining, in some place like SimplifyDemandedBitsForTargetNode? This would avoid needing the range metadata and might capture the sext case.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D67438/new/

https://reviews.llvm.org/D67438