[PATCH] D67875: [X86] X86DAGToDAGISel::matchBEXTRFromAndImm(): if can't use BEXTR, fallback to BZHI (PR43381)

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 21 09:10:48 PDT 2019


lebedev.ri added a comment.

In D67875#1677901 <https://reviews.llvm.org/D67875#1677901>, @davezarzycki wrote:

> If you have the time, the BZHI bits-to-preserve operand only needs MOVB for initialization. That being said, MOVL probably avoids partial register update stalls, so maybe that’s why you’re seeing a performance gain.


Yes, it is intentional to use 32-bit writes to avoid partial register access.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67875/new/

https://reviews.llvm.org/D67875





More information about the llvm-commits mailing list