[llvm] r372384 - [AMDGPU] Use std::make_tuple to make some toolchains happy again

Bjorn Pettersson via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 20 05:13:12 PDT 2019


Author: bjope
Date: Fri Sep 20 05:13:12 2019
New Revision: 372384

URL: http://llvm.org/viewvc/llvm-project?rev=372384&view=rev
Log:
[AMDGPU] Use std::make_tuple to make some toolchains happy again

My toolchain stopped working (LLVM 8.0 , libstdc++ 5.4.0) after
r372338.

The same problem was seen in clang-cuda-build buildbots:

clang-cuda-build/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:763:12:
error: chosen constructor is explicit in copy-initialization
    return {Reg, 0, nullptr};
           ^~~~~~~~~~~~~~~~~
/usr/bin/../lib/gcc/x86_64-linux-gnu/5.4.0/../../../../include/c++/5.4.0/tuple:479:19:
note: explicit constructor declared here
        constexpr tuple(_UElements&&... __elements)
                  ^

This commit adds explicit calls to std::make_tuple to work around
the problem.

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp?rev=372384&r1=372383&r2=372384&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp Fri Sep 20 05:13:12 2019
@@ -760,7 +760,7 @@ static std::tuple<Register, unsigned, Ma
 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) {
   MachineInstr *Def = getDefIgnoringCopies(Reg, MRI);
   if (!Def)
-    return {Reg, 0, nullptr};
+    return std::make_tuple(Reg, 0, nullptr);
 
   if (Def->getOpcode() == AMDGPU::G_CONSTANT) {
     unsigned Offset;
@@ -770,21 +770,21 @@ getBaseWithConstantOffset(MachineRegiste
     else
       Offset = Op.getCImm()->getZExtValue();
 
-    return {Register(), Offset, Def};
+    return std::make_tuple(Register(), Offset, Def);
   }
 
   int64_t Offset;
   if (Def->getOpcode() == AMDGPU::G_ADD) {
     // TODO: Handle G_OR used for add case
     if (mi_match(Def->getOperand(1).getReg(), MRI, m_ICst(Offset)))
-      return {Def->getOperand(0).getReg(), Offset, Def};
+      return std::make_tuple(Def->getOperand(0).getReg(), Offset, Def);
 
     // FIXME: matcher should ignore copies
     if (mi_match(Def->getOperand(1).getReg(), MRI, m_Copy(m_ICst(Offset))))
-      return {Def->getOperand(0).getReg(), Offset, Def};
+      return std::make_tuple(Def->getOperand(0).getReg(), Offset, Def);
   }
 
-  return {Reg, 0, Def};
+  return std::make_tuple(Reg, 0, Def);
 }
 
 static unsigned getBufferStoreOpcode(LLT Ty,
@@ -931,7 +931,7 @@ AMDGPUInstructionSelector::splitBufferOf
     B.setInsertPt(OldMBB, OldInsPt);
   }
 
-  return {BaseReg, ImmOffset, TotalConstOffset};
+  return std::make_tuple(BaseReg, ImmOffset, TotalConstOffset);
 }
 
 bool AMDGPUInstructionSelector::selectStoreIntrinsic(MachineInstr &MI,




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