[PATCH] D67266: [X86][NFC] Add a `use-aa` feature.

[Clement Courbet via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL371989: [X86][NFC] Add a `use-aa` feature. (authored by courbet, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D67266?vs=219072&id=220336#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67266/new/

https://reviews.llvm.org/D67266

Files:
  llvm/trunk/lib/Target/X86/X86.td
  llvm/trunk/lib/Target/X86/X86Subtarget.h


Index: llvm/trunk/lib/Target/X86/X86Subtarget.h
===================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h
@@ -427,6 +427,9 @@
   /// Use software floating point for code generation.
   bool UseSoftFloat = false;
 
+  /// Use alias analysis during code generation.
+  bool UseAA = false;
+
   /// The minimum alignment known to hold of the stack frame on
   /// entry to the function and which must be maintained by every function.
   unsigned stackAlignment = 4;
@@ -741,6 +744,7 @@
            X86ProcFamily == IntelTRM;
   }
   bool useSoftFloat() const { return UseSoftFloat; }
+  bool useAA() const override { return UseAA; }
 
   /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
   /// no-sse2). There isn't any reason to disable it if the target processor
Index: llvm/trunk/lib/Target/X86/X86.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86.td
+++ llvm/trunk/lib/Target/X86/X86.td
@@ -457,6 +457,10 @@
                                         "Merge branches to a three-way "
                                         "conditional branch">;
 
+// Enable use of alias analysis during code generation.
+def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
+                                    "Use alias analysis during codegen">;
+
 // Bonnell
 def ProcIntelAtom : SubtargetFeature<"", "X86ProcFamily", "IntelAtom", "">;
 // Silvermont


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67266.220336.patch
Type: text/x-patch
Size: 1530 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190916/2bd5eb46/attachment.bin>