[PATCH] D67596: AMDGPU/GlobalISel: Allow selection of scalar min/max

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 15 16:30:22 PDT 2019


arsenm created this revision.
arsenm added reviewers: alex-t, rampitec, kerbowa, tstellar, nhaehnle.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.

I believe all of the uniform/divergent pattern predicates are
 redundant and can be removed. The uniformity bit already influences
 the register class, and nothhing has broken when I've removed this and
 others.


https://reviews.llvm.org/D67596

Files:
  lib/Target/AMDGPU/SOPInstructions.td
  test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67596.220259.patch
Type: text/x-patch
Size: 7085 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190915/ea95965d/attachment.bin>


More information about the llvm-commits mailing list