[PATCH] D67397: [RISCV] Add MachineInstr immediate verification

Luís Marques via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 10 09:34:08 PDT 2019


luismarques added a comment.

In D67397#1664695 <https://reviews.llvm.org/D67397#1664695>, @lenary wrote:

> Is there a way to write a test for this? I realise any assembly goes through the parser, so will be caught before it hits this code. Is there another way of making this work? a MIR-based test?


I tested this by temporarily introducing invalid immediates in the existing `BuildMI`s, since I forgot to check if a MIR test would work. I'll check that option, thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67397/new/

https://reviews.llvm.org/D67397





More information about the llvm-commits mailing list