[llvm] r371531 - [RISCV] Add Option for Printing Architectural Register Names
Sam Elliott via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 10 08:55:56 PDT 2019
Author: lenary
Date: Tue Sep 10 08:55:55 2019
New Revision: 371531
URL: http://llvm.org/viewvc/llvm-project?rev=371531&view=rev
Log:
[RISCV] Add Option for Printing Architectural Register Names
Summary:
This is an option primarily to use during testing. Instead of always
printing registers using their ABI names, this allows a user to request they
are printed with their architectural name.
This is then used in the register constraint tests to ensure the mapping
between architectural and abi names is correct.
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: pzheng, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65950
Added:
llvm/trunk/test/MC/RISCV/numeric-reg-names-d.s
llvm/trunk/test/MC/RISCV/numeric-reg-names-f.s
llvm/trunk/test/MC/RISCV/numeric-reg-names.s
Modified:
llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
Modified: llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp?rev=371531&r1=371530&r2=371531&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp Tue Sep 10 08:55:55 2019
@@ -39,6 +39,12 @@ static cl::opt<bool>
cl::desc("Disable the emission of assembler pseudo instructions"),
cl::init(false), cl::Hidden);
+static cl::opt<bool>
+ ArchRegNames("riscv-arch-reg-names",
+ cl::desc("Print architectural register names rather than the "
+ "ABI names (such as x2 instead of sp)"),
+ cl::init(false), cl::Hidden);
+
void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot, const MCSubtargetInfo &STI) {
bool Res = false;
@@ -124,3 +130,8 @@ void RISCVInstPrinter::printAtomicMemOp(
O << ")";
return;
}
+
+const char *RISCVInstPrinter::getRegisterName(unsigned RegNo) {
+ return getRegisterName(RegNo, ArchRegNames ? RISCV::NoRegAltName
+ : RISCV::ABIRegAltName);
+}
Modified: llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h?rev=371531&r1=371530&r2=371531&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h (original)
+++ llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h Tue Sep 10 08:55:55 2019
@@ -48,8 +48,8 @@ public:
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo,
- unsigned AltIdx = RISCV::ABIRegAltName);
+ static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
};
} // namespace llvm
Added: llvm/trunk/test/MC/RISCV/numeric-reg-names-d.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/RISCV/numeric-reg-names-d.s?rev=371531&view=auto
==============================================================================
--- llvm/trunk/test/MC/RISCV/numeric-reg-names-d.s (added)
+++ llvm/trunk/test/MC/RISCV/numeric-reg-names-d.s Tue Sep 10 08:55:55 2019
@@ -0,0 +1,165 @@
+# RUN: llvm-mc -triple riscv32 -mattr=+f,+d < %s -riscv-arch-reg-names \
+# RUN: | FileCheck -check-prefix=CHECK-NUMERIC %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f,+d < %s \
+# RUN: | llvm-objdump -mattr=+f,+d -d -riscv-arch-reg-names - \
+# RUN: | FileCheck -check-prefix=CHECK-NUMERIC %s
+
+# CHECK-NUMERIC: fsqrt.d f10, f0
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f0
+fsqrt.d fa0, f0
+fsqrt.d fa0, ft0
+
+# CHECK-NUMERIC: fsqrt.d f10, f1
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f1
+fsqrt.d fa0, f1
+fsqrt.d fa0, ft1
+
+# CHECK-NUMERIC: fsqrt.d f10, f2
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f2
+fsqrt.d fa0, f2
+fsqrt.d fa0, ft2
+
+# CHECK-NUMERIC: fsqrt.d f10, f3
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f3
+fsqrt.d fa0, f3
+fsqrt.d fa0, ft3
+
+# CHECK-NUMERIC: fsqrt.d f10, f4
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f4
+fsqrt.d fa0, f4
+fsqrt.d fa0, ft4
+
+# CHECK-NUMERIC: fsqrt.d f10, f5
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f5
+fsqrt.d fa0, f5
+fsqrt.d fa0, ft5
+
+# CHECK-NUMERIC: fsqrt.d f10, f6
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f6
+fsqrt.d fa0, f6
+fsqrt.d fa0, ft6
+
+# CHECK-NUMERIC: fsqrt.d f10, f7
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f7
+fsqrt.d fa0, f7
+fsqrt.d fa0, ft7
+
+# CHECK-NUMERIC: fsqrt.d f10, f8
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f8
+fsqrt.d fa0, f8
+fsqrt.d fa0, fs0
+
+# CHECK-NUMERIC: fsqrt.d f10, f9
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f9
+fsqrt.d fa0, f9
+fsqrt.d fa0, fs1
+
+# CHECK-NUMERIC: fsqrt.d f10, f10
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f10
+fsqrt.d fa0, f10
+fsqrt.d fa0, fa0
+
+# CHECK-NUMERIC: fsqrt.d f10, f11
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f11
+fsqrt.d fa0, f11
+fsqrt.d fa0, fa1
+
+# CHECK-NUMERIC: fsqrt.d f10, f12
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f12
+fsqrt.d fa0, f12
+fsqrt.d fa0, fa2
+
+# CHECK-NUMERIC: fsqrt.d f10, f13
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f13
+fsqrt.d fa0, f13
+fsqrt.d fa0, fa3
+
+# CHECK-NUMERIC: fsqrt.d f10, f14
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f14
+fsqrt.d fa0, f14
+fsqrt.d fa0, fa4
+
+# CHECK-NUMERIC: fsqrt.d f10, f15
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f15
+fsqrt.d fa0, f15
+fsqrt.d fa0, fa5
+
+# CHECK-NUMERIC: fsqrt.d f10, f16
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f16
+fsqrt.d fa0, f16
+fsqrt.d fa0, fa6
+
+# CHECK-NUMERIC: fsqrt.d f10, f17
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f17
+fsqrt.d fa0, f17
+fsqrt.d fa0, fa7
+
+# CHECK-NUMERIC: fsqrt.d f10, f18
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f18
+fsqrt.d fa0, f18
+fsqrt.d fa0, fs2
+
+# CHECK-NUMERIC: fsqrt.d f10, f19
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f19
+fsqrt.d fa0, f19
+fsqrt.d fa0, fs3
+
+# CHECK-NUMERIC: fsqrt.d f10, f20
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f20
+fsqrt.d fa0, f20
+fsqrt.d fa0, fs4
+
+# CHECK-NUMERIC: fsqrt.d f10, f21
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f21
+fsqrt.d fa0, f21
+fsqrt.d fa0, fs5
+
+# CHECK-NUMERIC: fsqrt.d f10, f22
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f22
+fsqrt.d fa0, f22
+fsqrt.d fa0, fs6
+
+# CHECK-NUMERIC: fsqrt.d f10, f23
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f23
+fsqrt.d fa0, f23
+fsqrt.d fa0, fs7
+
+# CHECK-NUMERIC: fsqrt.d f10, f24
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f24
+fsqrt.d fa0, f24
+fsqrt.d fa0, fs8
+
+# CHECK-NUMERIC: fsqrt.d f10, f25
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f25
+fsqrt.d fa0, f25
+fsqrt.d fa0, fs9
+
+# CHECK-NUMERIC: fsqrt.d f10, f26
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f26
+fsqrt.d fa0, f26
+fsqrt.d fa0, fs10
+
+# CHECK-NUMERIC: fsqrt.d f10, f27
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f27
+fsqrt.d fa0, f27
+fsqrt.d fa0, fs11
+
+# CHECK-NUMERIC: fsqrt.d f10, f28
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f28
+fsqrt.d fa0, f28
+fsqrt.d fa0, ft8
+
+# CHECK-NUMERIC: fsqrt.d f10, f29
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f29
+fsqrt.d fa0, f29
+fsqrt.d fa0, ft9
+
+# CHECK-NUMERIC: fsqrt.d f10, f30
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f30
+fsqrt.d fa0, f30
+fsqrt.d fa0, ft10
+
+# CHECK-NUMERIC: fsqrt.d f10, f31
+# CHECK-NUMERIC-NEXT: fsqrt.d f10, f31
+fsqrt.d fa0, f31
+fsqrt.d fa0, ft11
Added: llvm/trunk/test/MC/RISCV/numeric-reg-names-f.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/RISCV/numeric-reg-names-f.s?rev=371531&view=auto
==============================================================================
--- llvm/trunk/test/MC/RISCV/numeric-reg-names-f.s (added)
+++ llvm/trunk/test/MC/RISCV/numeric-reg-names-f.s Tue Sep 10 08:55:55 2019
@@ -0,0 +1,165 @@
+# RUN: llvm-mc -triple riscv32 -mattr=+f < %s -riscv-arch-reg-names \
+# RUN: | FileCheck -check-prefix=CHECK-NUMERIC %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
+# RUN: | llvm-objdump -mattr=+f -d -riscv-arch-reg-names - \
+# RUN: | FileCheck -check-prefix=CHECK-NUMERIC %s
+
+# CHECK-NUMERIC: fsqrt.s f10, f0
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f0
+fsqrt.s fa0, f0
+fsqrt.s fa0, ft0
+
+# CHECK-NUMERIC: fsqrt.s f10, f1
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f1
+fsqrt.s fa0, f1
+fsqrt.s fa0, ft1
+
+# CHECK-NUMERIC: fsqrt.s f10, f2
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f2
+fsqrt.s fa0, f2
+fsqrt.s fa0, ft2
+
+# CHECK-NUMERIC: fsqrt.s f10, f3
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f3
+fsqrt.s fa0, f3
+fsqrt.s fa0, ft3
+
+# CHECK-NUMERIC: fsqrt.s f10, f4
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f4
+fsqrt.s fa0, f4
+fsqrt.s fa0, ft4
+
+# CHECK-NUMERIC: fsqrt.s f10, f5
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f5
+fsqrt.s fa0, f5
+fsqrt.s fa0, ft5
+
+# CHECK-NUMERIC: fsqrt.s f10, f6
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f6
+fsqrt.s fa0, f6
+fsqrt.s fa0, ft6
+
+# CHECK-NUMERIC: fsqrt.s f10, f7
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f7
+fsqrt.s fa0, f7
+fsqrt.s fa0, ft7
+
+# CHECK-NUMERIC: fsqrt.s f10, f8
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f8
+fsqrt.s fa0, f8
+fsqrt.s fa0, fs0
+
+# CHECK-NUMERIC: fsqrt.s f10, f9
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f9
+fsqrt.s fa0, f9
+fsqrt.s fa0, fs1
+
+# CHECK-NUMERIC: fsqrt.s f10, f10
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f10
+fsqrt.s fa0, f10
+fsqrt.s fa0, fa0
+
+# CHECK-NUMERIC: fsqrt.s f10, f11
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f11
+fsqrt.s fa0, f11
+fsqrt.s fa0, fa1
+
+# CHECK-NUMERIC: fsqrt.s f10, f12
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f12
+fsqrt.s fa0, f12
+fsqrt.s fa0, fa2
+
+# CHECK-NUMERIC: fsqrt.s f10, f13
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f13
+fsqrt.s fa0, f13
+fsqrt.s fa0, fa3
+
+# CHECK-NUMERIC: fsqrt.s f10, f14
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f14
+fsqrt.s fa0, f14
+fsqrt.s fa0, fa4
+
+# CHECK-NUMERIC: fsqrt.s f10, f15
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f15
+fsqrt.s fa0, f15
+fsqrt.s fa0, fa5
+
+# CHECK-NUMERIC: fsqrt.s f10, f16
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f16
+fsqrt.s fa0, f16
+fsqrt.s fa0, fa6
+
+# CHECK-NUMERIC: fsqrt.s f10, f17
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f17
+fsqrt.s fa0, f17
+fsqrt.s fa0, fa7
+
+# CHECK-NUMERIC: fsqrt.s f10, f18
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f18
+fsqrt.s fa0, f18
+fsqrt.s fa0, fs2
+
+# CHECK-NUMERIC: fsqrt.s f10, f19
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f19
+fsqrt.s fa0, f19
+fsqrt.s fa0, fs3
+
+# CHECK-NUMERIC: fsqrt.s f10, f20
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f20
+fsqrt.s fa0, f20
+fsqrt.s fa0, fs4
+
+# CHECK-NUMERIC: fsqrt.s f10, f21
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f21
+fsqrt.s fa0, f21
+fsqrt.s fa0, fs5
+
+# CHECK-NUMERIC: fsqrt.s f10, f22
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f22
+fsqrt.s fa0, f22
+fsqrt.s fa0, fs6
+
+# CHECK-NUMERIC: fsqrt.s f10, f23
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f23
+fsqrt.s fa0, f23
+fsqrt.s fa0, fs7
+
+# CHECK-NUMERIC: fsqrt.s f10, f24
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f24
+fsqrt.s fa0, f24
+fsqrt.s fa0, fs8
+
+# CHECK-NUMERIC: fsqrt.s f10, f25
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f25
+fsqrt.s fa0, f25
+fsqrt.s fa0, fs9
+
+# CHECK-NUMERIC: fsqrt.s f10, f26
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f26
+fsqrt.s fa0, f26
+fsqrt.s fa0, fs10
+
+# CHECK-NUMERIC: fsqrt.s f10, f27
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f27
+fsqrt.s fa0, f27
+fsqrt.s fa0, fs11
+
+# CHECK-NUMERIC: fsqrt.s f10, f28
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f28
+fsqrt.s fa0, f28
+fsqrt.s fa0, ft8
+
+# CHECK-NUMERIC: fsqrt.s f10, f29
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f29
+fsqrt.s fa0, f29
+fsqrt.s fa0, ft9
+
+# CHECK-NUMERIC: fsqrt.s f10, f30
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f30
+fsqrt.s fa0, f30
+fsqrt.s fa0, ft10
+
+# CHECK-NUMERIC: fsqrt.s f10, f31
+# CHECK-NUMERIC-NEXT: fsqrt.s f10, f31
+fsqrt.s fa0, f31
+fsqrt.s fa0, ft11
Added: llvm/trunk/test/MC/RISCV/numeric-reg-names.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/RISCV/numeric-reg-names.s?rev=371531&view=auto
==============================================================================
--- llvm/trunk/test/MC/RISCV/numeric-reg-names.s (added)
+++ llvm/trunk/test/MC/RISCV/numeric-reg-names.s Tue Sep 10 08:55:55 2019
@@ -0,0 +1,167 @@
+# RUN: llvm-mc -triple riscv32 < %s -riscv-arch-reg-names \
+# RUN: | FileCheck -check-prefix=CHECK-NUMERIC %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
+# RUN: | llvm-objdump -d -riscv-arch-reg-names - \
+# RUN: | FileCheck -check-prefix=CHECK-NUMERIC %s
+
+# CHECK-NUMERIC: addi x10, x0, 1
+# CHECK-NUMERIC-NEXT: addi x10, x0, 1
+addi a0, x0, 1
+addi a0, zero, 1
+
+# CHECK-NUMERIC: addi x10, x1, 1
+# CHECK-NUMERIC-NEXT: addi x10, x1, 1
+addi a0, x1, 1
+addi a0, ra, 1
+
+# CHECK-NUMERIC: addi x10, x2, 1
+# CHECK-NUMERIC-NEXT: addi x10, x2, 1
+addi a0, x2, 1
+addi a0, sp, 1
+
+# CHECK-NUMERIC: addi x10, x3, 1
+# CHECK-NUMERIC-NEXT: addi x10, x3, 1
+addi a0, x3, 1
+addi a0, gp, 1
+
+# CHECK-NUMERIC: addi x10, x4, 1
+# CHECK-NUMERIC-NEXT: addi x10, x4, 1
+addi a0, x4, 1
+addi a0, tp, 1
+
+# CHECK-NUMERIC: addi x10, x5, 1
+# CHECK-NUMERIC-NEXT: addi x10, x5, 1
+addi a0, x5, 1
+addi a0, t0, 1
+
+# CHECK-NUMERIC: addi x10, x6, 1
+# CHECK-NUMERIC-NEXT: addi x10, x6, 1
+addi a0, x6, 1
+addi a0, t1, 1
+
+# CHECK-NUMERIC: addi x10, x7, 1
+# CHECK-NUMERIC-NEXT: addi x10, x7, 1
+addi a0, x7, 1
+addi a0, t2, 1
+
+# CHECK-NUMERIC: addi x10, x8, 1
+# CHECK-NUMERIC-NEXT: addi x10, x8, 1
+# CHECK-NUMERIC-NEXT: addi x10, x8, 1
+addi a0, x8, 1
+addi a0, s0, 1
+addi a0, fp, 1
+
+# CHECK-NUMERIC: addi x10, x9, 1
+# CHECK-NUMERIC-NEXT: addi x10, x9, 1
+addi a0, x9, 1
+addi a0, s1, 1
+
+# CHECK-NUMERIC: addi x10, x10, 1
+# CHECK-NUMERIC-NEXT: addi x10, x10, 1
+addi a0, x10, 1
+addi a0, a0, 1
+
+# CHECK-NUMERIC: addi x10, x11, 1
+# CHECK-NUMERIC-NEXT: addi x10, x11, 1
+addi a0, x11, 1
+addi a0, a1, 1
+
+# CHECK-NUMERIC: addi x10, x12, 1
+# CHECK-NUMERIC-NEXT: addi x10, x12, 1
+addi a0, x12, 1
+addi a0, a2, 1
+
+# CHECK-NUMERIC: addi x10, x13, 1
+# CHECK-NUMERIC-NEXT: addi x10, x13, 1
+addi a0, x13, 1
+addi a0, a3, 1
+
+# CHECK-NUMERIC: addi x10, x14, 1
+# CHECK-NUMERIC-NEXT: addi x10, x14, 1
+addi a0, x14, 1
+addi a0, a4, 1
+
+# CHECK-NUMERIC: addi x10, x15, 1
+# CHECK-NUMERIC-NEXT: addi x10, x15, 1
+addi a0, x15, 1
+addi a0, a5, 1
+
+# CHECK-NUMERIC: addi x10, x16, 1
+# CHECK-NUMERIC-NEXT: addi x10, x16, 1
+addi a0, x16, 1
+addi a0, a6, 1
+
+# CHECK-NUMERIC: addi x10, x17, 1
+# CHECK-NUMERIC-NEXT: addi x10, x17, 1
+addi a0, x17, 1
+addi a0, a7, 1
+
+# CHECK-NUMERIC: addi x10, x18, 1
+# CHECK-NUMERIC-NEXT: addi x10, x18, 1
+addi a0, x18, 1
+addi a0, s2, 1
+
+# CHECK-NUMERIC: addi x10, x19, 1
+# CHECK-NUMERIC-NEXT: addi x10, x19, 1
+addi a0, x19, 1
+addi a0, s3, 1
+
+# CHECK-NUMERIC: addi x10, x20, 1
+# CHECK-NUMERIC-NEXT: addi x10, x20, 1
+addi a0, x20, 1
+addi a0, s4, 1
+
+# CHECK-NUMERIC: addi x10, x21, 1
+# CHECK-NUMERIC-NEXT: addi x10, x21, 1
+addi a0, x21, 1
+addi a0, s5, 1
+
+# CHECK-NUMERIC: addi x10, x22, 1
+# CHECK-NUMERIC-NEXT: addi x10, x22, 1
+addi a0, x22, 1
+addi a0, s6, 1
+
+# CHECK-NUMERIC: addi x10, x23, 1
+# CHECK-NUMERIC-NEXT: addi x10, x23, 1
+addi a0, x23, 1
+addi a0, s7, 1
+
+# CHECK-NUMERIC: addi x10, x24, 1
+# CHECK-NUMERIC-NEXT: addi x10, x24, 1
+addi a0, x24, 1
+addi a0, s8, 1
+
+# CHECK-NUMERIC: addi x10, x25, 1
+# CHECK-NUMERIC-NEXT: addi x10, x25, 1
+addi a0, x25, 1
+addi a0, s9, 1
+
+# CHECK-NUMERIC: addi x10, x26, 1
+# CHECK-NUMERIC-NEXT: addi x10, x26, 1
+addi a0, x26, 1
+addi a0, s10, 1
+
+# CHECK-NUMERIC: addi x10, x27, 1
+# CHECK-NUMERIC-NEXT: addi x10, x27, 1
+addi a0, x27, 1
+addi a0, s11, 1
+
+# CHECK-NUMERIC: addi x10, x28, 1
+# CHECK-NUMERIC-NEXT: addi x10, x28, 1
+addi a0, x28, 1
+addi a0, t3, 1
+
+# CHECK-NUMERIC: addi x10, x29, 1
+# CHECK-NUMERIC-NEXT: addi x10, x29, 1
+addi a0, x29, 1
+addi a0, t4, 1
+
+# CHECK-NUMERIC: addi x10, x30, 1
+# CHECK-NUMERIC-NEXT: addi x10, x30, 1
+addi a0, x30, 1
+addi a0, t5, 1
+
+# CHECK-NUMERIC: addi x10, x31, 1
+# CHECK-NUMERIC-NEXT: addi x10, x31, 1
+addi a0, x31, 1
+addi a0, t6, 1
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