[PATCH] D67214: [ARM] Remove some spurious MVE reduction instructions.

Simon Tatham via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 9 07:27:57 PDT 2019


simon_tatham updated this revision to Diff 219347.
simon_tatham added a comment.

Reworked the patch to reverse the multiclass nesting order, avoiding the need to fake a Tablegen `if` using `foreach`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67214/new/

https://reviews.llvm.org/D67214

Files:
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/MC/ARM/mve-reductions.s
  llvm/test/MC/Disassembler/ARM/mve-reductions.txt

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67214.219347.patch
Type: text/x-patch
Size: 15141 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190909/ecfd43d0/attachment.bin>


More information about the llvm-commits mailing list