[PATCH] D67085: [ARM] Fix loads and stores for v4i1 and v8i1

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 9 03:06:44 PDT 2019


SjoerdMeijer added a comment.

Hi Dave, I agree with your analysis. The codegen for this looks horrible, but it is what it is.

One question though. Loading and story and story data.....do we need to worry about LE and BE here?



================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:8745
+  // predicate, with the "v4i1" bits spread out over the 16 bits loaded. We
+  // need to make sure that 8/4 bits are actually loaded itto the correct
+  // place, which means loading the value and then shuffling the values into
----------------
nit, typo: itto


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67085/new/

https://reviews.llvm.org/D67085





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