[PATCH] D67055: AMDGPU/GlobalISel: Select G_FABS/G_FNEG

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: tstellar, nhaehnle, kerbowa.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.

f64 doesn't work yet because tablegen currently doesn't handlde
REG_SEQUENCE.

      

This does regress some multi use VALU fneg cases since now the
immediate remains in an SGPR, and more moves are used for legalizing
the xor. This is a SIFixSGPRCopies deficiency.


https://reviews.llvm.org/D67055

Files:
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  lib/Target/AMDGPU/SIInstructions.td
  test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
  test/CodeGen/AMDGPU/fneg-combines.ll
  test/CodeGen/AMDGPU/fneg.ll

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