[PATCH] D67021: [DAGCombiner] improve throughput of shift+logic+shift

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 218223.
spatel added a comment.

Patch updated:
Rebased after improving test coverage - cycle through various integer and vector types. 
It shows we miss an 'LEA' opportunity on x86, but I don't think that's a big deal.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67021/new/

https://reviews.llvm.org/D67021

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/bitfield-insert.ll
  llvm/test/CodeGen/AArch64/shift-logic.ll
  llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
  llvm/test/CodeGen/X86/shift-logic.ll

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