[PATCH] D67017: [X86] Add initial support for unfolding broadcast loads from arithmetic instructions to enable LICM hoisting of the load

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Aug 31 05:44:16 PDT 2019


RKSimon added a comment.

Does this break the X86FoldTablesEmitter in anyway?

In the future do you think we could we add something similar to support scalar ops and ops where memory size != register size?



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Comment at: llvm/lib/Target/X86/X86InstrFoldTables.cpp:5248
 
+static const X86MemoryFoldTableEntry BroadcastFoldTable2[] = {
+  { X86::VADDPDZ128rr,   X86::VADDPDZ128rmb,   TB_BCAST_SD },
----------------
Do masked ops work? Possibly add a few to this initial test?


================
Comment at: llvm/lib/Target/X86/X86InstrFoldTables.h:44
   // Minimum alignment required for load/store.
-  // Used for RegOp->MemOp conversion.
-  // (stored in bits 8 - 15)
+  // Used for RegOp->MemOp conversion. Encoded as Log2(Align) + 1 to allow 0
+  // to mean align of 0.
----------------
craig.topper wrote:
> I re-encoded these to get room for the broadcast type. I can pre-commit this.
I'm happy for the bit adjustments to go in straight away (without the new broadcast bits - these need to stay in this patch).


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  https://reviews.llvm.org/D67017/new/

https://reviews.llvm.org/D67017





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