[PATCH] D66938: [ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings

[Mark Murray via Phabricator via llvm-commits]

MarkMurrayARM created this revision.
MarkMurrayARM added reviewers: simon_tatham, olista01.
Herald added subscribers: llvm-commits, dmgreen, kristof.beyls, javed.absar.
Herald added a project: LLVM.

Decoding of VMSR doesn't diagnose some unpredictable encodings, as the unpredictable bits are not correctly set.

Diff-reduce this instruction's internals WRT VMRS so I can see the differences better. Mostly this is s/src/Rt/g.

Fill in the "should-be-(0)" bits.

Designate the Unpredictable{} bits for both VMRS and VMSR.


Repository:
  rL LLVM

https://reviews.llvm.org/D66938

Files:
  lib/Target/ARM/ARMInstrVFP.td
  test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt

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