[PATCH] D66004: [WIP][X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add general shuffle combining support

Tue Aug 27 15:04:19 PDT 2019

craig.topper added a comment.

In D66004#1647822 <https://reviews.llvm.org/D66004#1647822>, @craig.topper wrote:

> In D66004#1647773 <https://reviews.llvm.org/D66004#1647773>, @xbolva00 wrote:
>
> > Can this patch solve bad codegen for 'f5'?
> >
> > https://godbolt.org/z/3YpVg-
>
>
> I don't think any amount of shuffle combining is going to recover that. I think we need to look at lowerShuffleAsLanePermuteAndRepeatedMask

Nevermind, that won't fix it. The two lanes have different controls for the shufpd in gcc's code. I think we need a new strategy.

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66004/new/

https://reviews.llvm.org/D66004