[llvm] r369703 - [PowerPC] Automatically generate vec_buildvector_loadstore.ll . NFC

[Amaury Sechet via llvm-commits]

Author: deadalnix
Date: Thu Aug 22 13:42:50 2019
New Revision: 369703

URL: http://llvm.org/viewvc/llvm-project?rev=369703&view=rev
Log:
[PowerPC] Automatically generate vec_buildvector_loadstore.ll . NFC

Modified:
    llvm/trunk/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll?rev=369703&r1=369702&r2=369703&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll Thu Aug 22 13:42:50 2019
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -disable-ppc-ilp-pref  | FileCheck %s
 ; Formerly this did byte loads and word stores.
 @a = external global <16 x i8>
@@ -5,8 +6,20 @@
 @c = external global <16 x i8>
 
 define void @foo() nounwind ssp {
-; CHECK: foo:
-; CHECK-NOT: stw
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    li 3, a at l
+; CHECK-NEXT:    lis 4, a at ha
+; CHECK-NEXT:    lvx 2, 4, 3
+; CHECK-NEXT:    li 3, .LCPI0_0 at l
+; CHECK-NEXT:    lis 4, .LCPI0_0 at ha
+; CHECK-NEXT:    lvx 3, 4, 3
+; CHECK-NEXT:    vxor 4, 4, 4
+; CHECK-NEXT:    li 3, c at l
+; CHECK-NEXT:    lis 4, c at ha
+; CHECK-NEXT:    vperm 2, 4, 2, 3
+; CHECK-NEXT:    stvx 2, 4, 3
+; CHECK-NEXT:    blr
 entry:
     %tmp0 = load <16 x i8>, <16 x i8>* @a, align 16
   %tmp180.i = extractelement <16 x i8> %tmp0, i32 0 ; <i8> [#uses=1]
@@ -33,5 +46,4 @@ entry:
 
 return:		; preds = %bb2
 	ret void
-; CHECK: blr
 }