[PATCH] D66519: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32

[Sam Tebbs via Phabricator via llvm-commits]

samtebbs created this revision.
samtebbs added reviewers: dmgreen, SjoerdMeijer, samparker, t.p.northover, olista01, simon_tatham.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.

This patch fixes shifts by a 128/256 bit shift amount. It also fixes
codegen for shifts of 32 by delegating to LLVM's default optimisation
instead of emitting a long shift.

Tests that used to generate long shifts of 32 are updated to check for the
more optimised codegen.


https://reviews.llvm.org/D66519

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/ARM/shift_parts.ll
  llvm/test/CodeGen/Thumb2/mve-abs.ll
  llvm/test/CodeGen/Thumb2/mve-div-expand.ll
  llvm/test/CodeGen/Thumb2/mve-vcvt.ll

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