[PATCH] D62592: [RISCV] Add assembler support for RVC HINT instructions

[Alex Bradbury via Phabricator via llvm-commits]

asb added inline comments.


================
Comment at: llvm/test/MC/RISCV/rvc-hints-valid.s:25
+
+# CHECK-ASM-AND-OBJ: c.li    zero, 0
+# CHECK-ASM: encoding: [0x01,0x40]
----------------
Nit: we typically get rid of the multiple spaces after the mnemonic as shown in this line and others


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62592/new/

https://reviews.llvm.org/D62592