[PATCH] D66077: [GlobalISel] Handle multiple registers in dbg.value intrinsic

[Peter Waller via Phabricator via llvm-commits]

peterwaller-arm updated this revision to Diff 215840.
peterwaller-arm marked an inline comment as done.
peterwaller-arm added a comment.

Add target triple to test.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66077/new/

https://reviews.llvm.org/D66077

Files:
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/test/CodeGen/Generic/DbgValueAggregate.ll


Index: llvm/test/CodeGen/Generic/DbgValueAggregate.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/Generic/DbgValueAggregate.ll
@@ -0,0 +1,36 @@
+; RUN: llc -O0 -global-isel < %s | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define void @MAIN_() #0 {
+L.entry:
+  %0 = load <{ float, float }>, <{ float, float }>* undef, align 1
+  ; CHECK: DEBUG_VALUE: localvar
+  ; CHECK: DEBUG_VALUE: localvar
+  call void @llvm.dbg.value(metadata <{ float, float }> %0, metadata !10, metadata !DIExpression()), !dbg !13
+  unreachable
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.value(metadata, metadata, metadata) #1
+
+attributes #0 = { "no-frame-pointer-elim-non-leaf" }
+attributes #1 = { nounwind readnone speculatable }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_Fortran90, file: !2, producer: "", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !3, retainedTypes: !3, globals: !3, imports: !4)
+!2 = !DIFile(filename: "input", directory: "/")
+!3 = !{}
+!4 = !{!5}
+!5 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !6, entity: !9, file: !2, line: 18)
+!6 = distinct !DISubprogram(name: "p", scope: !1, file: !2, line: 18, type: !7, isLocal: false, isDefinition: true, scopeLine: 18, isOptimized: false, unit: !1)
+!7 = !DISubroutineType(cc: DW_CC_program, types: !8)
+!8 = !{null}
+!9 = !DIModule(scope: !1, name: "mod")
+!10 = !DILocalVariable(name: "localvar", scope: !11, file: !2, type: !12)
+!11 = !DILexicalBlock(scope: !6, file: !2, line: 18, column: 1)
+!12 = !DIBasicType(name: "complex", size: 64, align: 32, encoding: DW_ATE_complex_float)
+!13 = !DILocation(line: 0, scope: !11)
Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -1380,12 +1380,13 @@
     } else if (const auto *CI = dyn_cast<Constant>(V)) {
       MIRBuilder.buildConstDbgValue(*CI, DI.getVariable(), DI.getExpression());
     } else {
-      Register Reg = getOrCreateVReg(*V);
-      // FIXME: This does not handle register-indirect values at offset 0. The
-      // direct/indirect thing shouldn't really be handled by something as
-      // implicit as reg+noreg vs reg+imm in the first palce, but it seems
-      // pretty baked in right now.
-      MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(), DI.getExpression());
+      for (Register Reg : getOrCreateVRegs(*V)) {
+        // FIXME: This does not handle register-indirect values at offset 0. The
+        // direct/indirect thing shouldn't really be handled by something as
+        // implicit as reg+noreg vs reg+imm in the first place, but it seems
+        // pretty baked in right now.
+        MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(), DI.getExpression());
+      }
     }
     return true;
   }


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