[llvm] r369172 - [AArch64][GlobalISel] Fix an assertion during G_UNMERGE selection for s128 types.

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Fri Aug 16 16:23:40 2019
New Revision: 369172

URL: http://llvm.org/viewvc/llvm-project?rev=369172&view=rev
Log:
[AArch64][GlobalISel] Fix an assertion during G_UNMERGE selection for s128 types.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=369172&r1=369171&r2=369172&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Fri Aug 16 16:23:40 2019
@@ -2963,7 +2963,9 @@ bool AArch64InstructionSelector::selectU
   const LLT NarrowTy = MRI.getType(I.getOperand(0).getReg());
   const LLT WideTy = MRI.getType(SrcReg);
   (void)WideTy;
-  assert(WideTy.isVector() && "can only unmerge from vector types!");
+  assert(WideTy.isVector() ||
+         WideTy.getSizeInBits() == 128 &&
+             "can only unmerge from vector or s128 types!");
   assert(WideTy.getSizeInBits() > NarrowTy.getSizeInBits() &&
          "source register size too small!");
 

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir?rev=369172&r1=369171&r2=369172&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir Fri Aug 16 16:23:40 2019
@@ -27,6 +27,8 @@
     ret <2 x half> undef
   }
 
+  define void @test_s128(i128 %p) { ret void }
+
 ...
 ---
 name:            test_v2s64_unmerge
@@ -208,3 +210,18 @@ body:             |
     $s1 = COPY %2(<2 x s16>)
     RET_ReallyLR implicit $s0
 ...
+---
+name:            test_s128
+alignment:       2
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.1:
+    liveins: $q0
+    %0:fpr(s128) = COPY $q0
+    %1:fpr(s64), %2:fpr(s64) = G_UNMERGE_VALUES %0(s128)
+    $d0 = COPY %1(s64)
+    $d1 = COPY %2(s64)
+    RET_ReallyLR implicit $d0, implicit $d1
+...