[PATCH] D66285: [ARM] Correct register for narrowing and widening MVE loads and stores.

[Dave Green via Phabricator via llvm-commits]

dmgreen marked an inline comment as done.
dmgreen added a comment.

Thanks for taking a look



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Comment at: llvm/lib/Target/ARM/Thumb2InstrInfo.cpp:656
+    if ((unsigned)Offset <= Mask * Scale &&
+        (Register::isVirtualRegister(FrameReg) ||
+         RegClass->contains(FrameReg))) {
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ostannard wrote:
> Is it possible to get here with a virtual register of the wrong class? I think we'd need a call to `constrainRegClass` here in that case.
Hmm, I have not seen us hit this, but it's certainly better to be safe than sorry! I'll add a check.


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