[PATCH] D66309: Introduce infrastructure for an incremental port of SelectionDAG atomic load/store handling

Thu Aug 15 13:03:50 PDT 2019

reames created this revision.
reames added reviewers: jlebar, jfb, craig.topper, RKSimon, efriedma.
Herald added subscribers: dexonsmith, bollu, mcrosier.
Herald added a project: LLVM.

This is the first patch in a large sequence.  The eventual goal is to have unordered atomic loads and stores - and possibly ordered atomics as well - handled through the normal ISEL codepaths for loads and stores.  Today, there handled w/instances of AtomicSDNodes.  The result of which is that all transforms need to be duplicated to work for unordered atomics.  The benefit of the current design is that it's harder to introduce a silent miscompile by adding an transform which forgets about atomicity.

The basic strategy I plan on taking is:

1. introduce infrastructure and a flag for testing (this patch)
2. introduce isSimpleMMO and replace all isVolatile with it
3. piecemeal update generic code and x86 backedge code in individual reviews w/tests for cases which didn't check volatile, but can be found with inspection
4. flip the flag at the end

We've taken a very similar strategy twice before with success - once at IR level, and once at the MI level (post ISEL).  I'll probably need some help with some of the ISEL patterns since that's the part I'm not familiar with.

Note that this patch is NFC unless the experimental flag is set.

Repository:
  rL LLVM

https://reviews.llvm.org/D66309

Files:
  include/llvm/CodeGen/SelectionDAGNodes.h
  include/llvm/CodeGen/TargetLowering.h
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/atomic-unordered.ll

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